On Sun, May 13, 2012 at 09:54:09AM +0100, Chris Wilson wrote:
> Hidden away within one chipset specific path was the necessary logic to
> turn on the PLL. This needs to be done everywhere in order for us to
> drive any display! As such as soon as we tested on a non-CougarPoint
> chipset, we failed to bring up any DisplayPorts and generated a nice set
> of assertion failures in the process. At least one part of our logic is
> working, the part that assumes that we have no idea what we are doing.
>
> Reported-by: [email protected]
> References: https://bugs.freedesktop.org/show_bug.cgi?id=49712
> Signed-off-by: Chris Wilson <[email protected]>
> Cc: Jesse Barnes <[email protected]>
I guess as-is this patch will blow up on hsw. I think we need to change
the BUG_ON(!pll) in there into a return, like in the disable code. Eugeni?
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index a679a9a..d0112ec 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2887,14 +2887,14 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
> /* For PCH output, training FDI link */
> dev_priv->display.fdi_link_train(crtc);
>
> + intel_enable_pch_pll(intel_crtc);
> +
> if (HAS_PCH_LPT(dev)) {
> DRM_DEBUG_KMS("LPT detected: programming iCLKIP\n");
> lpt_program_iclkip(crtc);
> } else if (HAS_PCH_CPT(dev)) {
> u32 sel;
>
> - intel_enable_pch_pll(intel_crtc);
> -
> temp = I915_READ(PCH_DPLL_SEL);
> switch (pipe) {
> default:
> --
> 1.7.10
>
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Mail: [email protected]
Mobile: +41 (0)79 365 57 48
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
