Hi everybody, As you can see here: screenshot <http://imgur.com/a/iy1xq>
The data throughput rate for Rx is ~10 MiB/s, which is half of what is expected (~20 MiB/s). The board is a modification of the Hackrf project, which has an FPGA instead of the CPLD for onboard baseband processing capabilities. The project is detailed here <https://github.com/ainnovators/noob-sdr> Edit: I have not made any changes to the firmware except: - Changed the constraints to UCF format (required for Artix-7 XC7A15T) - Increased the maximum file length in the hackrf_cpldjtag to accommodate our generated xsvf file
_______________________________________________ HackRF-dev mailing list [email protected] https://pairlist9.pair.net/mailman/listinfo/hackrf-dev
