Hi, Can anyone please tell me whether a multi-level TLB implementation is currently available for x86?
Thanks Arun On Wed, Oct 28, 2020 at 9:01 PM Jason Lowe-Power via gem5-users < [email protected]> wrote: > Yes, this is possible, and I believe it's already implemented for Arm. > > The best place to start is src/arch/<your architecture>/tlb.cc > > Cheers, > Jason > > On Wed, Oct 28, 2020 at 1:27 AM Laney Laney via gem5-users < > [email protected]> wrote: > >> Hi,all. I would like to know if it is possible to implement multi-level >> TLB on gem5 performance by modeling the latency of TLB. If so, which files >> or functions should I start with? >> _______________________________________________ >> gem5-users mailing list -- [email protected] >> To unsubscribe send an email to [email protected] >> %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s >> > _______________________________________________ > gem5-users mailing list -- [email protected] > To unsubscribe send an email to [email protected] > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
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