On 05/19/11 01:32, Richard Sandiford wrote: > Paul Koning <paul_kon...@dell.com> writes: >> It looks like the machinery that picks MIPS branch-likely instructions >> (on processors that don't object to them) is driven purely by their >> delay slot annul properties and not at all by branch probability. > > Unfortunately, reorg.c is very old code that is effectively in deep > maintainance mode. It has many problems: it doesn't use proper liveness > information (instead using rather expensive and less accurate estimates > based on old block boundaries), it operates after normal scheduling, > so can disrupt the pipeline. Etc. Add doesn't use dependency analysis to identify candidate insns for delay slots. That would greatly help it's behaviour in certain circumstances... It's a mess to say the least and hasn't had any major work for probably 15 years.
jeff
