Hi,
I am doing a port for a 32bit target in GCC 4.4.0. I need a way to
identify that a register is part of a multiword register. I need to
emit an instruction that works on LSW of the double word register on
move instructions. Currently the target splits the DImode and DFmode
moves after reloading. So i am able to generate the required
instruction while doing the split. But it seems that sometimes the
subreg pass splits the multiword register into SImode or SFmode
register references before reg-alloc. Since it is not required to
split these moves, I am not able to insert the required instruction
for LSW. So I was wondering if it is possible to recognize a register
as a part of a multiword register? In the rtl-dumps there are
expressions like :
(insn 255 254 256 2 pr28634.c:13 (set (mem/v/c/i:SI (plus:SI (reg/f:SI 49 sp)
(const_int -16 [0xfffffff0])) [2 y+0 S4 A64])
(reg:SI 2 d2)) 2 {*movsi_internal} (nil))
(insn 256 255 257 2 pr28634.c:13 (set (mem/v/c/i:SI (plus:SI (reg/f:SI 49 sp)
(const_int -12 [0xfffffff4])) [2 y+4 S4 A32])
(reg:SI 3 d3 [+4 ])) 2 {*movsi_internal} (nil))
which points out that d3 is part of a multiword register. Looking into
the gcc sources I find that this is done with the help of REG_OFFSET
macro. So can I use this macro to identify a register as a part of
multiword register? Is there any other way to do this?
Regards,
Shafi
