daniel tian <daniel.xnt...@gmail.com> writes:
> mvx_audio_dec_mp3_test.c:112: error: unable to find a register to
> spill in class 'R0_REG'
> mvx_audio_dec_mp3_test.c:112: error: this is the insn:
> (insn 185 134 133 6 (set (reg/f:SI 4 R4 [101])
> (const_int 2076 [0x81c])) 4 {load_imm_low_si} (nil)
> (expr_list:REG_EQUIV (const_int 2076 [0x81c])
> (nil)))
>
> PS: there are 16 general registers in my RISC chip, from R0 to R15.
> R14, and R15 are used for FP,SP. R0 register is special.
> Every large immediate, larger than 512, must be moved into R0
> register, which means that R0 is the only register to load large
> immediate.
One thing you certainly need to do is set REG_ALLOC_ORDER so that r0 is
the last register allocated.
> I have traced the rtl code, and RTL code was combined from two rtl
> instructions(R14 is Frame pointer register):
>
> (insn 129 127 168 6 (set (reg:SI 88)
> (const_int 2064 [0x810])) 4 {load_imm_low_si} (nil)
> (nil))
>
> (insn 168 129 131 6 (set (reg/f:SI 101)
> (plus:SI (reg/f:SI 14 R14)
> (const_int 12 [0xc]))) 45 {rice_addsi3} (nil)
> (nil))
>
> (insn 133 131 134 6 (set (reg:SI 4 R4)
> (plus:SI (reg/f:SI 101)
> (reg:SI 88))) 45 {rice_addsi3} (nil)
> (expr_list:REG_EQUAL (plus:SI (reg/f:SI 14 R14)
> (const_int 2076 [0x81c]))
> (nil)))
You need to set TARGET_RTX_COSTS so that constants larger than 512 are
more expensive than registers. That should prevent the constant from
being propagated into the insn.
> So before cc1 crashed, the unrecognized insn doesn't go through the
> LEGITIMIZE_RELOAD_ADDRESS and PREFERRED_RELOAD_CLASS macro.
> Is there any solution I can handle the similar problems?
You're right, for a pure load like this, you will need a secondary
reload.
Ian
