On Sat, 27 May 2023 at 23:03, Stefan Kanthak <stefan.kant...@nexgo.de> wrote: > > "Andrew Pinski" <pins...@gmail.com> wrote: > > > On Sat, May 27, 2023 at 2:38 PM Stefan Kanthak <stefan.kant...@nexgo.de> > > wrote: > >> > >> "Jakub Jelinek" <ja...@redhat.com> wrote, completely clueless: > >> > >>> On Sat, May 27, 2023 at 11:04:11PM +0200, Stefan Kanthak wrote: > >>>> OUCH: popcnt writes the WHOLE result register, there is ABSOLUTELY > >>>> no need to clear it beforehand nor to clear the higher 24 bits > >>>> afterwards! > >>> > >>> Except that there is. See https://gcc.gnu.org/PR62011 for details. > >> > >> GUESS WHY I EXPLICITLY WROTE > >> > >> | JFTR: before GCC zealots write nonsense: see -march= or -mtune= > >> > >> NOT AMUSED ABOUT YOUR CRYING INCOMPETENCE! > > > > So you want to complain about GCC knowing about an Intel performance > > errata???? > > Ever heard about cargo cult? > > Read the options I used CAREFULLY > > | gcc -m32 -march=alderlake -O3 > | gcc -m32 -march=sapphirerapids -O3 > | gcc -m32 -mpopcnt -mtune=sapphirerapids -O3 > > > If you read that bug report, you would have learned why the zeroing is > > done. I am sorry you hate GCC for actually following advice from the > > processor maker after all. > > HSD146 does NOT apply to Alder Lake or Sapphire Rapids! > > NOT AMUSED ABOUT YOUR INCOMPETENCE TOO! > Stefan
File a proper bug report then, instead of subjecting this mailing list to your clown show.
