Hi Maciej,
> -----Original Message-----
> From: Rozycki, Maciej
> Sent: Monday, November 17, 2014 2:39 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Moore, Catherine; Eric Christopher; Matthew Fortune
> Subject: [PATCH] microMIPS/GCC: Correct 64-bit instruction sizes
>
> Hi,
>
> Noticed in an attempt to build a 64-bit microMIPS Linux kernel.
>
> None of the 64-bit operations have a short instruction encoding in the
> microMIPS instruction set. Despite that our code has been written such that
> the presence of a short encoding is assumed for both 32-bit and 64-bit
> operations. This leads to assembly warnings like:
>
> {standard input}: Assembler messages:
> {standard input}:146: Warning: wrong size instruction in a 16-bit branch delay
> slot {standard input}:544: Warning: wrong size instruction in a 16-bit branch
> delay slot {standard input}:1071: Warning: wrong size instruction in a 16-bit
> branch delay slot {standard input}:1088: Warning: wrong size instruction in a
> 16-bit branch delay slot {standard input}:1833: Warning: wrong size
> instruction in a 16-bit branch delay slot
>
> This is because code in question produced by GCC looks like:
>
> jals get_option #
> daddiu $4,$sp,16 #,,
>
> (in a `.set noreorder' fragment) and there is no short encoding for the
> DADDIU instruction available.
>
> At least two approaches are possible to address this problem, either by
> splitting the iterated patterns affected into separate 32-bit and 64-bit
> patterns, or by limiting the affected alternatives to 32-bit operations only.
> I
> found the latter less intrusive, with the use of an extra `compression'
> attribute value: `micromips32'.
I prefer the second approach as well.
This is implemented with the change below,
> fixing the issues seen in 64-bit compilation. Code produced now looks like:
>
> jal get_option #
> daddiu $4,$sp,16 #,,
>
> instead.
>
> Some operations are operand size agnostic, these include LI16, MOVE16, and
> all the relevant logical instructions. These retain the `micromips'
> setting for the `compression' attribute. MOVEP is also operand size agnostic,
> but it must not be scheduled into a delay slot and it is therefore handled
> separately, with no `compression' attribute defined.
>
> Regression-tested with the mips-linux-gnu target and these multilibs:
>
> -EB
> -EB -mips16
> -EB -mmicromips
> -EB -mabi=n32
> -EB -mabi=64
>
> and the -EL variants of same, with no changes in results. I have also checked
> that microMIPS shared glibc libraries have not changed when rebuilt with the
> updated compiler.
>
> OK to apply?
>
> 2014-11-14 Maciej W. Rozycki <ma...@codesourcery.com>
>
> gcc/
> * config/mips/mips.md (compression): Add `micromips32' setting.
> (enabled, length): Handle it.
> (shift_compression): Replace `micromips' with `micromips32' in
> the `compression' attribute.
> (*add<mode>3, sub<mode>3): Likewise.
Yes, this looks good.
Thanks,
Catherine
