On Tue, Oct 21, 2014 at 10:48 AM, Hale Wang <hale.w...@arm.com> wrote:
> Hi,
>
> This patch is used to tune the gcc for Cortex-M7.
>
> The performance of Dhrystone can be improved by 1%.
> The performance of Coremark can be improved by 2.3%.
>
> Patch also attached for convenience.
>
> Is it ok for trunk?
>
> Thanks and Best Regards,
> Hale Wang
Ok - For the future please include [Patch ARM] in your subject line.
Otherwise my filters won't catch these as requiring attention for the
ARM backend.
regards
Ramana
>
> gcc/ChangeLog
> 2014-10-11 Hale Wang <hale.w...@arm.com>
>
> * config/arm/arm.c: Add cortex-m7 tune.
> * config/arm/arm-cores.def: Use cortex-m7 tune.
>
> diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
> index 56ec7fd..3b34173 100644
> --- a/gcc/config/arm/arm-cores.def
> +++ b/gcc/config/arm/arm-cores.def
> @@ -149,7 +149,7 @@ ARM_CORE("cortex-r4",
> cortexr4, cortexr4, 7R, FL_LDSCHED, cortex)
> ARM_CORE("cortex-r4f", cortexr4f, cortexr4f,
> 7R, FL_LDSCHED, cortex)
> ARM_CORE("cortex-r5", cortexr5, cortexr5,
> 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
> ARM_CORE("cortex-r7", cortexr7, cortexr7,
> 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
> -ARM_CORE("cortex-m7", cortexm7, cortexm7,
> 7EM, FL_LDSCHED, v7m)
> +ARM_CORE("cortex-m7", cortexm7, cortexm7,
> 7EM, FL_LDSCHED, cortex_m7)
> ARM_CORE("cortex-m4", cortexm4, cortexm4,
> 7EM, FL_LDSCHED, v7m)
> ARM_CORE("cortex-m3", cortexm3, cortexm3,
> 7M, FL_LDSCHED, v7m)
> ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4,
> 7A, FL_LDSCHED, 9e)
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 93b989d..834b13a 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -2003,6 +2003,27 @@ const struct tune_params arm_v7m_tune =
> 8
> /* Maximum insns to inline memset. */
> };
>
> +/* Cortex-M7 tuning. */
> +
> +const struct tune_params arm_cortex_m7_tune =
> +{
> + arm_9e_rtx_costs,
> + &v7m_extra_costs,
> + NULL,
> /* Sched adj cost. */
> + 0,
> /* Constant limit. */
> + 0,
> /* Max cond insns. */
> + ARM_PREFETCH_NOT_BENEFICIAL,
> + true,
> /* Prefer constant pool. */
> + arm_cortex_m_branch_cost,
> + false,
> /* Prefer LDRD/STRD. */
> + {true, true},
> /* Prefer non short circuit. */
> + &arm_default_vec_cost, /* Vectorizer costs. */
> + false, /* Prefer Neon for 64-bits
> bitops. */
> + false, false, /* Prefer 32-bit encodings.
> */
> + false,
> /* Prefer Neon for stringops. */
> + 8
> /* Maximum insns to inline memset. */
> +};
> +
> /* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than
> arm_v6t2_tune. It is used for cortex-m0, cortex-m1 and cortex-m0plus.
> */
> const struct tune_params arm_v6m_tune =
>
>
>
