This is a small clean-up patch to remove code relating to reloading or moving
mips fcc registers. At some point in the past these registers were allocated
as part of register allocation but they are now statically allocated in the
backend in a round robin fashion. The code for reloading them is therefore not
necessary any more. The move costs are also irrelevant so are replaced with
a comment instead (but the cases can just be deleted if that is preferred).

Matthew

gcc/

        * config/mips/mips-protos.h (mips_expand_fcc_reload): Remove.
        * config/mips/mips.c (mips_expand_fcc_reload): Remove.
        (mips_move_to_gpr_cost): ST_REGS can't be moved.
        (mips_move_from_gpr_cost): Likewise.
        (mips_register_move_cost): Likewise.

---
 gcc/config/mips/mips-protos.h |    1 -
 gcc/config/mips/mips.c        |   41 ++++-------------------------------------
 2 files changed, 4 insertions(+), 38 deletions(-)

diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
index 0b8125a..0b32a70 100644
--- a/gcc/config/mips/mips-protos.h
+++ b/gcc/config/mips/mips-protos.h
@@ -232,7 +232,6 @@ extern bool mips_use_pic_fn_addr_reg_p (const_rtx);
 extern rtx mips_expand_call (enum mips_call_type, rtx, rtx, rtx, rtx, bool);
 extern void mips_split_call (rtx, rtx);
 extern bool mips_get_pic_call_symbol (rtx *, int);
-extern void mips_expand_fcc_reload (rtx, rtx, rtx);
 extern void mips_set_return_address (rtx, rtx);
 extern bool mips_move_by_pieces_p (unsigned HOST_WIDE_INT, unsigned int);
 extern bool mips_store_by_pieces_p (unsigned HOST_WIDE_INT, unsigned int);
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 73b6963..1fb5ba2 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -7195,35 +7195,6 @@ mips_function_ok_for_sibcall (tree decl, tree exp 
ATTRIBUTE_UNUSED)
   return true;
 }
 

-/* Emit code to move general operand SRC into condition-code
-   register DEST given that SCRATCH is a scratch TFmode FPR.
-   The sequence is:
-
-       FP1 = SRC
-       FP2 = 0.0f
-       DEST = FP2 < FP1
-
-   where FP1 and FP2 are single-precision FPRs taken from SCRATCH.  */
-
-void
-mips_expand_fcc_reload (rtx dest, rtx src, rtx scratch)
-{
-  rtx fp1, fp2;
-
-  /* Change the source to SFmode.  */
-  if (MEM_P (src))
-    src = adjust_address (src, SFmode, 0);
-  else if (REG_P (src) || GET_CODE (src) == SUBREG)
-    src = gen_rtx_REG (SFmode, true_regnum (src));
-
-  fp1 = gen_rtx_REG (SFmode, REGNO (scratch));
-  fp2 = gen_rtx_REG (SFmode, REGNO (scratch) + MAX_FPRS_PER_FMT);
-
-  mips_emit_move (copy_rtx (fp1), src);
-  mips_emit_move (copy_rtx (fp2), CONST0_RTX (SFmode));
-  emit_insn (gen_slt_sf (dest, fp2, fp1));
-}
-

 /* Implement MOVE_BY_PIECES_P.  */
 
 bool
@@ -12045,8 +12016,8 @@ mips_move_to_gpr_cost (enum machine_mode mode 
ATTRIBUTE_UNUSED,
       return 4;
 
     case ST_REGS:
-      /* LUI followed by MOVF.  */
-      return 4;
+      /* Not possible.  ST_REGS are never moved.  */
+      return 0;
 
     case COP0_REGS:
     case COP2_REGS:
@@ -12082,9 +12053,8 @@ mips_move_from_gpr_cost (enum machine_mode mode, 
reg_class_t to)
       return 4;
 
     case ST_REGS:
-      /* A secondary reload through an FPR scratch.  */
-      return (mips_register_move_cost (mode, GENERAL_REGS, FP_REGS)
-             + mips_register_move_cost (mode, FP_REGS, ST_REGS));
+      /* Not possible.  ST_REGS are never moved.  */
+      return 0;
 
     case COP0_REGS:
     case COP2_REGS:
@@ -12117,9 +12087,6 @@ mips_register_move_cost (enum machine_mode mode,
       if (to == FP_REGS && mips_mode_ok_for_mov_fmt_p (mode))
        /* MOV.FMT.  */
        return 4;
-      if (to == ST_REGS)
-       /* The sequence generated by mips_expand_fcc_reload.  */
-       return 8;
     }
 
   /* Handle cases in which only one class deviates from the ideal.  */
-- 
1.7.1

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