On 04/28/2014 01:43 PM, Evgeny Stupachenko wrote:
> Agree on checks:
>
> /* PALIGNR of 2 128-bits registers takes only 1 instrucion.
> Requires SSSE3. */
> if (GET_MODE_SIZE (d->vmode) == 16)
> {
> if(!TARGET_SSSE3)
> return false;
> }
> /* PALIGNR of 2 256-bits registers on AVX2 costs only 2 instructions:
> PERM and PALIGNR. It is more profitable than 2 PSHUFB and PERM. */
> else if (GET_MODE_SIZE (d->vmode) == 32)
> {
> if(!TARGET_AVX2)
> return false;
> }
> else
> return false;
Thanks, much better.
r~
