> -----Original Message-----
> From: Richard Earnshaw
> Sent: Tuesday, November 26, 2013 5:44 PM
> To: Terry Guo
> Cc: Ramana Radhakrishnan; gcc-patches@gcc.gnu.org
> Subject: Re: [Patch, ARM] Fix ICE when high register is used as pic base
> register for thumb1 target
>
> On 26/11/13 04:18, Terry Guo wrote:
> > Hi,
> >
> > This patch intends to fix ICE when high register is used for pic base
> > register for thumb1 target. Tested with gcc regression test, no new
> > regressions. Is it OK to trunk?
> >
> > BR,
> > Terry
> >
> > gcc/ChangeLog:
> >
> > 2013-11-26 Terry Guo <terry....@arm.com>
> >
> > * config/arm/arm.c (require_pic_register): Handle high pic
> > base register for
> > thumb-1.
> > (arm_load_pic_register): Also initialize high pic base register.
> > * doc/invoke.texi: Update documentation for option
-mpic-register.
> >
> > gcc/testsuite/ChangeLog:
> >
> > 2013-11-26 Terry Guo <terry....@arm.com>
> >
> > * gcc.target/arm/thumb1-pic-high.c: New case.
> > * gcc.target/arm/thumb1-pic-single-base.c: New case.
> >
> >
> > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index
> > 501d080..f0b46e9 100644
> > --- a/gcc/doc/invoke.texi
> > +++ b/gcc/doc/invoke.texi
> > @@ -12216,8 +12216,11 @@ before execution begins.
> >
> > @item -mpic-register=@var{reg}
> > @opindex mpic-register
> > -Specify the register to be used for PIC addressing. The default is
> > R10 -unless stack-checking is enabled, when R9 is used.
> > +Specify the register to be used for PIC addressing.
> > +For standard PIC base case, the default will be any suitable register
> > +determined by compiler. For single PIC base case, the default is R9
> > +if target is EABI based or stack-checking is enabled, otherwise the
> > +default is R10.
> >
>
> Please can you put @samp{<reg>} around the uses of R9 and R10.
> Otherwise, OK.
> R.
>
Thanks Richard. The updated patch is committed to trunk. Is it OK to
backport to FSF 4.8 branch as a bug fix?
BR,
Terry
