OK /Marcus
On 30 April 2013 16:42, James Greenhalgh <james.greenha...@arm.com> wrote: > > Hi, > > This patch refactors the reduc_<su>plus RTL patterns in the > AArch64 back-end. We do this to provide a more uniform > interface for arm_neon.h builtins. Because of this we can rewrite > the intrinsics in arm_neon.h to use these standard pattern names, > and allow the signed varients to fold to tree where appropriate. > > Patch regression tested on aarch64-none-elf with no regressions. > > Thanks, > James > > --- > gcc/ > > 2013-04-30 James Greenhalgh <james.greenha...@arm.com> > > * config/aarch64/aarch64-builtins.c > (aarch64_gimple_fold_builtin.c): Fold more modes for reduc_splus_. > * config/aarch64/aarch64-simd-builtins.def > (reduc_splus_): Add new modes. > (reduc_uplus_): New. > * config/aarch64/aarch64-simd.md (aarch64_addvv4sf): Remove. > (reduc_uplus_v4sf): Likewise. > (reduc_splus_v4sf): Likewise. > (aarch64_addv<mode>): Likewise. > (reduc_uplus_<mode>): Likewise. > (reduc_splus_<mode>): Likewise. > (aarch64_addvv2di): Likewise. > (reduc_uplus_v2di): Likewise. > (reduc_splus_v2di): Likewise. > (aarch64_addvv2si): Likewise. > (reduc_uplus_v2si): Likewise. > (reduc_splus_v2si): Likewise. > (reduc_<sur>plus_<mode>): New. > (reduc_<sur>plus_v2di): Likewise. > (reduc_<sur>plus_v2si): Likewise. > (reduc_<sur>plus_v4sf): Likewise. > (aarch64_addpv4sf): Likewise. > * config/aarch64/arm_neon.h > (vaddv<q>_<s,u,f><8, 16, 32, 64): Rewrite using builtins. > * config/aarch64/iterators.md (unspec): Remove UNSPEC_ADDV, > add UNSPEC_SADDV, UNSPEC_UADDV. > (SUADDV): New. > (sur): Add UNSPEC_SADDV, UNSPEC_UADDV. > > gcc/testsuite/ > > 2013-04-30 James Greenhalgh <james.greenha...@arm.com> > > * gcc.target/aarch64/vect-vaddv.c: New.
