Hello! Attached patch fixes PR44578, where MMX register was allocated for zero_extendsidi2 RTX. The patch adds "!" to the interfering alternative, so RA won't choose alternative involving MMX register unless absolute necessary.
2013-04-29 Uros Bizjak <ubiz...@gmail.com> PR target/44578 * config/i386/i386.md (*zero_extendisid2): Add "!" to m->?*y alternative. testsuite/ChangeLog: 2013-04-29 Uros Bizjak <ubiz...@gmail.com> PR target/44578 * gcc.target/i386/pr44578.c: New test. Patch was bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32} and was committed to mainline SVN. The patch will be backported to 4.7 and 4.8 branches. Uros.
Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 198401) +++ config/i386/i386.md (working copy) @@ -3049,10 +3049,10 @@ (define_insn "*zero_extendsidi2" [(set (match_operand:DI 0 "nonimmediate_operand" - "=r,?r,?o,r ,o,?*Ym,?*y,?*Yi,?*x") + "=r,?r,?o,r ,o,?*Ym,?!*y,?*Yi,?*x") (zero_extend:DI (match_operand:SI 1 "x86_64_zext_operand" - "0 ,rm,r ,rmWz,0,r ,m ,r ,m")))] + "0 ,rm,r ,rmWz,0,r ,m ,r ,m")))] "" { switch (get_attr_type (insn)) Index: testsuite/gcc.target/i386/pr44578.c =================================================================== --- testsuite/gcc.target/i386/pr44578.c (revision 0) +++ testsuite/gcc.target/i386/pr44578.c (working copy) @@ -0,0 +1,31 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mtune=athlon64" } */ + +extern void abort (void); + +long double +__attribute__((noinline, noclone)) +test (float num) +{ + unsigned int i; + + if (num < 0.0) + num = 0.0; + + __builtin_memcpy (&i, &num, sizeof(unsigned int)); + + return (long double)(unsigned long long) i; +} + +int +main () +{ + long double x; + + x = test (0.0); + + if (x != 0.0) + abort (); + + return 0; +}