Dear All,
I am working on Cortex-A15 using latest GCC toolchain.
As we know that VFPv4 and SIMDv2 are the Cortex-A15 CPU Features,
so, compared to VFPv3/ SIMDv1, in VFPv4/SIMDv2 has following
additional instruction support
* VFMA, VFMS - Fused multiply accumulate, Fused multiply subtract.
* VFNMA, VFNMS - Fused multiply accumulate with negation, Fused
multiply subtract with negation.
To check whether these instructions are generated or not. I took the
GCC-4.8 branch (snapshot) from FSF.
I noticed there are following testcases available for VFMA, VFMS instructions
* gcc/testsuite/gcc.target/arm/neon-vfma-1.c
* gcc/testsuite/gcc.target/arm/neon-vfms-1.c
But for the VFNMA, VFNMS instructions there are no test case
available. So I have created the patch to test these instruction.
Please find the attached patch
I have tested these instruction with GCC and these instructions are generated.
Please review and marge this test support patch in gcc main trunk.
Thank You,
Amol Pise
diff -Narub gcc/testsuite/gcc.target/arm/neon-vfnma-1.c
gcc/testsuite/gcc.target/arm/neon-vfnma-1.c
--- gcc/testsuite/gcc.target/arm/neon-vfnma-1.c 1970-01-01 05:30:00.000000000
+0530
+++ gcc/testsuite/gcc.target/arm/neon-vfnma-1.c 2013-01-21 14:30:13.000000000
+0530
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neonv2_ok } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */
+/* { dg-add-options arm_neonv2 } */
+/* { dg-final { scan-assembler "vfnma\\.f32\[ \]+\[dDqQ]" } } */
+
+/* Verify that VFNMA is used. */
+void f1(int n, float a, float x[], float y[]) {
+ int i;
+ for (i = 0; i < n; ++i)
+ y[i] = a * -x[i] - y[i];
+}
diff -Narub gcc/testsuite/gcc.target/arm/neon-vfnms-1.c
gcc/testsuite/gcc.target/arm/neon-vfnms-1.c
--- gcc/testsuite/gcc.target/arm/neon-vfnms-1.c 1970-01-01 05:30:00.000000000
+0530
+++ gcc/testsuite/gcc.target/arm/neon-vfnms-1.c 2013-01-21 14:30:13.000000000
+0530
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neonv2_ok } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */
+/* { dg-add-options arm_neonv2 } */
+/* { dg-final { scan-assembler "vfnms\\.f32\[ \]+\[dDqQ]" } } */
+
+/* Verify that VFNMS is used. */
+void f1(int n, float a, float x[], float y[]) {
+ int i;
+ for (i = 0; i < n; ++i)
+ y[i] = a * x[i] - y[i];
+}
