Enable 16 macro-fusion pairs in xt_c9501_tune_info:
Address calculation:
RISCV_FUSE_LUI_ADDI, RISCV_FUSE_AUIPC_ADDI
Arithmetic and logic:
RISCV_FUSE_SUB_SEQZ, RISCV_FUSE_ADD_ANDI, RISCV_FUSE_ANDI_ADD,
RISCV_FUSE_LOGIC_LOGIC
Shift:
RISCV_FUSE_SLLI_SRLI, RISCV_FUSE_SRLI_ADD
Load/store with address update:
RISCV_FUSE_PREINDEX_LD, RISCV_FUSE_PREINDEX_ST,
RISCV_FUSE_POSTINDEX_LD, RISCV_FUSE_POSTINDEX_ST,
RISCV_FUSE_LDST_PAIR_INC, RISCV_FUSE_LDST_PAIR_DEC
Load/store with address computation:
RISCV_FUSE_ADD_LD, RISCV_FUSE_ADD_ST
RISCV_FUSE_FLDFST_PAIR_INC and RISCV_FUSE_FLDFST_PAIR_DEC are
defined but not enabled for any target yet.
Update the corresponding testsuite tests from xfail to pass.
gcc/ChangeLog:
* config/riscv/riscv.cc (xt_c9501_tune_info): Enable all
macro-fusion pairs supported by xt-c9501fdvt.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/fusion-sub-seqz-snez.c: Remove xfail.
* gcc.target/riscv/fusion-add-addi-andi.c: Likewise.
* gcc.target/riscv/fusion-andi-add-addi.c: Likewise.
* gcc.target/riscv/fusion-srli-add.c: Likewise.
* gcc.target/riscv/fusion-logic-logic.c: Likewise.
* gcc.target/riscv/fusion-slli-srli.c: Likewise.
* gcc.target/riscv/fusion-preindex-ldst.c: Likewise.
* gcc.target/riscv/fusion-postindex-ldst.c: Likewise.
* gcc.target/riscv/fusion-ldst-pair-inc.c: Likewise.
* gcc.target/riscv/fusion-ldst-pair-dec.c: Likewise.
* gcc.target/riscv/fusion-add-ldst.c: Likewise.
---
gcc/config/riscv/riscv.cc | 11 ++-
.../gcc.target/riscv/fusion-add-addi-andi.c | 2 +-
.../gcc.target/riscv/fusion-add-ldst.c | 4 +-
.../gcc.target/riscv/fusion-andi-add-addi.c | 2 +-
.../gcc.target/riscv/fusion-ldst-pair-dec.c | 2 +-
.../gcc.target/riscv/fusion-ldst-pair-inc.c | 2 +-
.../gcc.target/riscv/fusion-logic-logic.c | 2 +-
.../gcc.target/riscv/fusion-postindex-ldst.c | 4 +-
.../gcc.target/riscv/fusion-preindex-ldst.c | 79 +++++++++++++------
.../gcc.target/riscv/fusion-slli-srli.c | 2 +-
.../gcc.target/riscv/fusion-srli-add.c | 2 +-
.../gcc.target/riscv/fusion-sub-seqz-snez.c | 2 +-
12 files changed, 79 insertions(+), 35 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index f709a70b361..279c1fe4aff 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -730,7 +730,16 @@ static const struct riscv_tune_param xt_c9501_tune_info = {
false, /* overlap_op_by_pieces */
true, /* use_zero_stride_load
*/
false, /* speculative_sched_vsetvl */
- RISCV_FUSE_NOTHING, /* fusible_ops */
+ RISCV_FUSE_LUI_ADDI | RISCV_FUSE_AUIPC_ADDI
+ | RISCV_FUSE_SUB_SEQZ
+ | RISCV_FUSE_ADD_ANDI
+ | RISCV_FUSE_ADD_LD | RISCV_FUSE_ADD_ST
+ | RISCV_FUSE_ANDI_ADD | RISCV_FUSE_LOGIC_LOGIC
+ | RISCV_FUSE_SLLI_SRLI | RISCV_FUSE_SRLI_ADD
+ | RISCV_FUSE_PREINDEX_LD | RISCV_FUSE_PREINDEX_ST
+ | RISCV_FUSE_POSTINDEX_LD | RISCV_FUSE_POSTINDEX_ST
+ | RISCV_FUSE_LDST_PAIR_INC
+ | RISCV_FUSE_LDST_PAIR_DEC, /* fusible_ops */
&xt_c9501_vector_cost, /* vector cost */
"32", /* function_align */
"8", /* jump_align */
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-add-addi-andi.c
b/gcc/testsuite/gcc.target/riscv/fusion-add-addi-andi.c
index 2954734bc9a..d63d6e5828b 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-add-addi-andi.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-add-addi-andi.c
@@ -3,7 +3,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc_zba -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_ADD_ANDI. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_ADD_ANDI" "sched2" { xfail *-*-* } }
} */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_ADD_ANDI" "sched2" } } */
typedef long int64_t;
typedef unsigned long uint64_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-add-ldst.c
b/gcc/testsuite/gcc.target/riscv/fusion-add-ldst.c
index 50cb48a3799..3cd02781e48 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-add-ldst.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-add-ldst.c
@@ -4,8 +4,8 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_ADD_LD/ST. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_ADD_LD" "sched2" { xfail *-*-* } } }
*/
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_ADD_ST" "sched2" { xfail *-*-* } } }
*/
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_ADD_LD" "sched2" } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_ADD_ST" "sched2" } } */
typedef signed char int8_t;
typedef unsigned char uint8_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-andi-add-addi.c
b/gcc/testsuite/gcc.target/riscv/fusion-andi-add-addi.c
index 75c74dfd6bb..e375fa2508b 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-andi-add-addi.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-andi-add-addi.c
@@ -3,7 +3,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc_zba -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_ANDI_ADD. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_ANDI_ADD" "sched2" { xfail *-*-* } }
} */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_ANDI_ADD" "sched2" } } */
typedef long int64_t;
typedef unsigned long uint64_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-dec.c
b/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-dec.c
index 188d829cb52..267ffef326c 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-dec.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-dec.c
@@ -4,7 +4,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_LDST_PAIR_DEC. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_LDST_PAIR_DEC" "sched2" { xfail
*-*-* } } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_LDST_PAIR_DEC" "sched2" } } */
typedef int int32_t;
typedef long int64_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-inc.c
b/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-inc.c
index 9fe5c81ce09..040d82f4408 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-inc.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-ldst-pair-inc.c
@@ -4,7 +4,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_LDST_PAIR_INC. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_LDST_PAIR_INC" "sched2" { xfail
*-*-* } } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_LDST_PAIR_INC" "sched2" } } */
typedef int int32_t;
typedef long int64_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-logic-logic.c
b/gcc/testsuite/gcc.target/riscv/fusion-logic-logic.c
index 826e088f4bf..81672b66a93 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-logic-logic.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-logic-logic.c
@@ -4,7 +4,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc_zbb -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_LOGIC_LOGIC. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_LOGIC_LOGIC" "sched2" { xfail *-*-*
} } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_LOGIC_LOGIC" "sched2" } } */
typedef long int64_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-postindex-ldst.c
b/gcc/testsuite/gcc.target/riscv/fusion-postindex-ldst.c
index 9eb56bdc16b..12001c108c9 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-postindex-ldst.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-postindex-ldst.c
@@ -4,8 +4,8 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" "-Os" "-Oz" "-funroll-loops"
} } */
/* { dg-options "-march=rv64gc_zfh -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_POSTINDEX_LD/ST. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_POSTINDEX_LD" "sched2" { xfail *-*-*
} } } */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_POSTINDEX_ST" "sched2" { xfail *-*-*
} } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_POSTINDEX_LD" "sched2" } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_POSTINDEX_ST" "sched2" } } */
typedef signed char int8_t;
typedef unsigned char uint8_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-preindex-ldst.c
b/gcc/testsuite/gcc.target/riscv/fusion-preindex-ldst.c
index ab9ce96daad..fbcc712599b 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-preindex-ldst.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-preindex-ldst.c
@@ -3,9 +3,8 @@
/* { dg-do compile } */
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" "-Os" "-Oz" "-funroll-loops"
} } */
/* { dg-options "-march=rv64gc_zfh -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
-/* xt-c9501fdvt does not yet enable RISCV_FUSE_PREINDEX_LD/ST. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_PREINDEX_LD" "sched2" { xfail *-*-*
} } } */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_PREINDEX_ST" "sched2" { xfail *-*-*
} } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_PREINDEX_LD" "sched2" } } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_PREINDEX_ST" "sched2" } } */
typedef signed char int8_t;
typedef unsigned char uint8_t;
@@ -15,30 +14,66 @@ typedef int int32_t;
typedef unsigned int uint32_t;
typedef long int64_t;
-extern void use_ptr (void *);
+/* --- Pre-index LOAD: loop forces addi+load pairing --- */
-int8_t test_preindex_lb (int8_t *p) { p += 2; int8_t v = *p; use_ptr
(p); return v; }
-uint8_t test_preindex_lbu (uint8_t *p) { p += 2; uint8_t v = *p; use_ptr
(p); return v; }
-int16_t test_preindex_lh (int16_t *p) { p += 2; int16_t v = *p; use_ptr
(p); return v; }
-uint16_t test_preindex_lhu (uint16_t *p) { p += 2; uint16_t v = *p; use_ptr
(p); return v; }
-int32_t test_preindex_lw (int32_t *p) { p += 2; int32_t v = *p; use_ptr
(p); return v; }
-uint32_t test_preindex_lwu (uint32_t *p) { p += 2; uint32_t v = *p; use_ptr
(p); return v; }
-int64_t test_preindex_ld (int64_t *p) { p += 2; int64_t v = *p; use_ptr
(p); return v; }
-_Float16 test_preindex_flh (_Float16 *p) { p += 2; _Float16 v = *p; use_ptr
(p); return v; }
-float test_preindex_flw (float *p) { p += 2; float v = *p; use_ptr
(p); return v; }
-double test_preindex_fld (double *p) { p += 2; double v = *p; use_ptr
(p); return v; }
+int8_t test_preindex_lb (int8_t *p, int n)
+{
+ int8_t s = 0;
+ for (int i = 0; i < n; i++) { p += 2; s += *p; }
+ return s;
+}
-void test_preindex_sb (int8_t *p, int8_t v, int n)
-{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
-void test_preindex_sh (int16_t *p, int16_t v, int n)
+int16_t test_preindex_lh (int16_t *p, int n)
+{
+ int16_t s = 0;
+ for (int i = 0; i < n; i++) { p += 2; s += *p; }
+ return s;
+}
+
+int32_t test_preindex_lw (int32_t *p, int n)
+{
+ int32_t s = 0;
+ for (int i = 0; i < n; i++) { p += 2; s += *p; }
+ return s;
+}
+
+int64_t test_preindex_ld (int64_t *p, int n)
+{
+ int64_t s = 0;
+ for (int i = 0; i < n; i++) { p += 2; s += *p; }
+ return s;
+}
+
+float test_preindex_flw (float *p, int n)
+{
+ float s = 0;
+ for (int i = 0; i < n; i++) { p += 2; s += *p; }
+ return s;
+}
+
+double test_preindex_fld (double *p, int n)
+{
+ double s = 0;
+ for (int i = 0; i < n; i++) { p += 2; s += *p; }
+ return s;
+}
+
+/* --- Pre-index STORE: loop forces addi+store pairing --- */
+
+void test_preindex_sb (int8_t *p, int8_t v, int n)
{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
-void test_preindex_sw (int32_t *p, int32_t v, int n)
+
+void test_preindex_sh (int16_t *p, int16_t v, int n)
{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
-void test_preindex_sd (int64_t *p, int64_t v, int n)
+
+void test_preindex_sw (int32_t *p, int32_t v, int n)
{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
-void test_preindex_fsh (_Float16 *p, _Float16 v, int n)
+
+void test_preindex_sd (int64_t *p, int64_t v, int n)
{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
-void test_preindex_fsw (float *p, float v, int n)
+
+void test_preindex_fsw (float *p, float v, int n)
{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
-void test_preindex_fsd (double *p, double v, int n)
+
+void test_preindex_fsd (double *p, double v, int n)
{ for (int i = 0; i < n; i++) { p += 2; *p = v; } }
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-slli-srli.c
b/gcc/testsuite/gcc.target/riscv/fusion-slli-srli.c
index bd2d20f7b2b..2bcabbc4293 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-slli-srli.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-slli-srli.c
@@ -4,7 +4,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_SLLI_SRLI. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_SLLI_SRLI" "sched2" { xfail *-*-* }
} } */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_SLLI_SRLI" "sched2" } } */
typedef unsigned long uint64_t;
typedef unsigned int uint32_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-srli-add.c
b/gcc/testsuite/gcc.target/riscv/fusion-srli-add.c
index 0ba65fbf65d..df9340305a3 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-srli-add.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-srli-add.c
@@ -4,7 +4,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_SRLI_ADD. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_SRLI_ADD" "sched2" { xfail *-*-* } }
} */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_SRLI_ADD" "sched2" } } */
typedef long int64_t;
typedef unsigned long uint64_t;
diff --git a/gcc/testsuite/gcc.target/riscv/fusion-sub-seqz-snez.c
b/gcc/testsuite/gcc.target/riscv/fusion-sub-seqz-snez.c
index 093e37db76a..2fac4e8af4a 100644
--- a/gcc/testsuite/gcc.target/riscv/fusion-sub-seqz-snez.c
+++ b/gcc/testsuite/gcc.target/riscv/fusion-sub-seqz-snez.c
@@ -3,7 +3,7 @@
/* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
/* { dg-options "-march=rv64gc -mabi=lp64d -mtune=xt-c9501fdvt -O2
-fdump-rtl-sched2-details" } */
/* xt-c9501fdvt does not yet enable RISCV_FUSE_SUB_SEQZ. */
-/* { dg-final { scan-rtl-dump "RISCV_FUSE_SUB_SEQZ" "sched2" { xfail *-*-* } }
} */
+/* { dg-final { scan-rtl-dump "RISCV_FUSE_SUB_SEQZ" "sched2" } } */
typedef long int64_t;
typedef int int32_t;
--
2.52.0
