On Fri, Mar 27, 2026 at 06:55:10PM +0100, FX Coudert wrote: > Hi, > > This patch adds the Apple M5 cores to the aarch64 list. > The values for chip IDs and the LITTLE.big variants have been confirmed > in the XNU sources (xnu/osfmk/arm/cpuid.h). > > OK to push? >
The patch looks fine to me as is. However, I wonder whether we should also be adding SME extensions to the core definitions for apple-m4 and apple-m5 now that GCC supports SME without nonstreaming SVE. Alice > > gcc/ChangeLog: > > * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Apple M5 > cores. > * config/aarch64/aarch64-tune.md: Regenerate. > * doc/invoke.texi: Add apple-m5 core to the ones listed > for arch and tune selections. > --- > gcc/config/aarch64/aarch64-cores.def | 5 ++++- > gcc/config/aarch64/aarch64-tune.md | 2 +- > gcc/doc/invoke.texi | 2 +- > 3 files changed, 6 insertions(+), 3 deletions(-) >
