Hi,

This patch depends on the -mcpu=future and ISA 3.0 AMO implementation
patches and will be upstreamed after those patches are upstreamed.
These changes have been bootstrapped and regression tested on
powerpc64le-linux.

This patch adds support for compare-and-swap-equal atomic memory
operations that may be added to a future PowerPC processor. Note that
the names of these functions may change in the future.

Add _AMO_LD_CS_EQ to the _AMO_LD enum and define four new
compare-and-swap equal helper functions, all guarded by _ARCH_FUTURE.
For non-Future targets, provide error-attribute stubs to emit a
compile-time diagnostic.

2026-03-10  Jeevitha Palanisamy  <[email protected]>

gcc/
        * config/rs6000/amo.h (_AMO_LD): Add _AMO_LD_CS_EQ enumerator,
        gated on _ARCH_FUTURE.
        (amo_lwat_cas_eq, amo_lwat_scas_eq, amo_ldat_cas_eq,
        amo_ldat_scas_eq): New compare-and-swap equal helper functions.
        (_AMO_ERR_CMPSWP): New macro for error-attribute stubs on
        non-Future targets.

gcc/testsuite/
        * gcc.target/powerpc/amo8.c: New test.

diff --git a/gcc/config/rs6000/amo.h b/gcc/config/rs6000/amo.h
index 2b52ec755de..0b6997327ae 100644
--- a/gcc/config/rs6000/amo.h
+++ b/gcc/config/rs6000/amo.h
@@ -44,6 +44,9 @@ enum _AMO_LD {
   _AMO_LD_SMIN         = 0x07,         /* Fetch and Signed Minimum.  */
   _AMO_LD_SWAP         = 0x08,         /* Swap.  */
   _AMO_LD_CS_NE        = 0x10,         /* Compare and Swap Not Equal.  */
+#ifdef _ARCH_FUTURE
+  _AMO_LD_CS_EQ        = 0x11,         /* Compare and Swap Equal.  */
+#endif
   _AMO_LD_INC_BOUNDED  = 0x18,         /* Fetch and Increment Bounded.  */
   _AMO_LD_INC_EQUAL    = 0x19,         /* Fetch and Increment Equal.  */
   _AMO_LD_DEC_BOUNDED  = 0x1C          /* Fetch and Decrement Bounded.  */
@@ -159,6 +162,26 @@ _AMO_LD_INCREMENT (amo_ldat_sinc_eq,      int64_t, "ldat", 
_AMO_LD_INC_EQUAL)
 _AMO_LD_INCREMENT (amo_ldat_sinc_bounded, int64_t, "ldat", _AMO_LD_INC_BOUNDED)
 _AMO_LD_DECREMENT (amo_ldat_sdec_bounded, int64_t, "ldat", _AMO_LD_DEC_BOUNDED)
 
+/* Future specific compare-and-swap equal operations.  */
+#ifdef _ARCH_FUTURE
+_AMO_LD_CMPSWP (amo_lwat_cas_eq,  uint32_t, "lwat", _AMO_LD_CS_EQ)
+_AMO_LD_CMPSWP (amo_lwat_scas_eq, int32_t,  "lwat", _AMO_LD_CS_EQ)
+_AMO_LD_CMPSWP (amo_ldat_cas_eq,  uint64_t, "ldat", _AMO_LD_CS_EQ)
+_AMO_LD_CMPSWP (amo_ldat_scas_eq, int64_t,  "ldat", _AMO_LD_CS_EQ)
+#else /* ! _ARCH_FUTURE */
+/* Dummy declarations with GCC error attribute: Triggers custom error on use.  
*/
+#define _AMO_ERR_CMPSWP(NAME, TYPE) \
+extern TYPE \
+NAME (TYPE *_ADDR, TYPE _COND, TYPE _VALUE) \
+  __attribute__ ((error (#NAME " requires -mcpu=future; not available on 
Power10 or earlier")));
+
+_AMO_ERR_CMPSWP (amo_lwat_cas_eq,  uint32_t)
+_AMO_ERR_CMPSWP (amo_lwat_scas_eq, int32_t)
+_AMO_ERR_CMPSWP (amo_ldat_cas_eq,  uint64_t)
+_AMO_ERR_CMPSWP (amo_ldat_scas_eq, int64_t)
+#undef _AMO_ERR_CMPSWP
+#endif
+
 /* Enumeration of the STWAT/STDAT sub-opcodes.  */
 enum _AMO_ST {
   _AMO_ST_ADD          = 0x00,         /* Store Add.  */
diff --git a/gcc/testsuite/gcc.target/powerpc/amo8.c 
b/gcc/testsuite/gcc.target/powerpc/amo8.c
new file mode 100644
index 00000000000..8c68fd290bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/amo8.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+#include <amo.h>
+#include <stdint.h>
+
+/* Verify Future ISA atomic memory compare-and-swap equal operations.  */
+
+uint32_t
+do_lw_cs_eq (uint32_t *mem, uint32_t cond, uint32_t value)
+{
+  return amo_lwat_cas_eq (mem, cond, value);
+}
+
+int32_t
+do_lw_scs_eq (int32_t *mem, int32_t cond, int32_t value)
+{
+  return amo_lwat_scas_eq (mem, cond, value);
+}
+
+uint64_t
+do_ld_cs_eq (uint64_t *mem, uint64_t cond, uint64_t value)
+{
+  return amo_ldat_cas_eq (mem, cond, value);
+}
+
+int64_t
+do_ld_scs_eq (int64_t *mem, int64_t cond, int64_t value)
+{
+  return amo_ldat_scas_eq (mem, cond, value);
+}
+
+/* { dg-final { scan-assembler-times {\mlwat\M}  2 } } */
+/* { dg-final { scan-assembler-times {\mldat\M}  2 } } */

Reply via email to