> From: Haochen Jiang <[email protected]>
> Sent: Monday, December 15, 2025 3:27 PM
>
> Hi all,
>
> It is yet another year end and time to add the changes for Intel x86_64
> backend for GCC 16. Nothing special for that part.
>
> In GCC 16 timeframe, there are quite a few changes for ISA enabled on
> compiler switches backported to previous release branch, making the switch
> behavior has minor difference between minor versions. What we have done
> previously for SRF/GRR is to sliently change the documentation. This is not
> a good way to show the diff. Thus, I spent some time to explicitly mention
> the minor version changes correspondingly in the doc where it is introduced.
> Hope the info is not overloaded for users.
>
> Ok for wwwdocs trunk?
Hi Gerald,
Any comments on this wwwdocs patch? Is this change ok for you or you think
it might be too overloaded for "brief" summary?
Thx,
Haochen
>
> Thx,
> Haochen
>
> ---
> htdocs/gcc-12/changes.html | 3 +++
> htdocs/gcc-13/changes.html | 19 +++++++++++++------
> htdocs/gcc-14/changes.html | 22 +++++++++++++++-------
> htdocs/gcc-15/changes.html | 19 +++++++++++++++----
> htdocs/gcc-16/changes.html | 28 ++++++++++++++++++++++++++++
> 5 files changed, 74 insertions(+), 17 deletions(-)
>
> diff --git a/htdocs/gcc-12/changes.html b/htdocs/gcc-12/changes.html
> index 0a091123..a2fc5fcb 100644
> --- a/htdocs/gcc-12/changes.html
> +++ b/htdocs/gcc-12/changes.html
> @@ -768,6 +768,9 @@ function Multiply (S1, S2 : Sign) return Sign is
> AVX512-FP16 intrinsics are available via the <code>-mavx512fp16</code>
> compiler switch.
> </li>
> + <li>Since GCC 12.5, CLDEMOTE is not enabled through the compiler switch
> + <code>-march=alderlake</code>.
> + </li>
> <li>For both C and C++ the <code>_Float16</code> type is supported on
> x86 systems with SSE2 enabled. Without <code>{-mavx512fp16}</code>,
> all operations will be emulated in software and <code>float</code>
> diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
> index 4a7b95d3..9c596f6d 100644
> --- a/htdocs/gcc-13/changes.html
> +++ b/htdocs/gcc-13/changes.html
> @@ -668,21 +668,25 @@ You may also want to check out our
> </li>
> <li>GCC now supports the Intel CPU named Raptor Lake through
> <code>-march=raptorlake</code>.
> - Raptor Lake is based on Alder Lake.
> + Raptor Lake is based on Alder Lake. Since GCC 13.5, CLDEMOTE is not
> + enabled.
> </li>
> <li>GCC now supports the Intel CPU named Meteor Lake through
> <code>-march=meteorlake</code>.
> - Meteor Lake is based on Alder Lake.
> + Meteor Lake is based on Alder Lake. Since GCC 13.5, CLDEMOTE is not
> + enabled.
> </li>
> <li>GCC now supports the Intel CPU named Sierra Forest through
> <code>-march=sierraforest</code>.
> - Based on ISA extensions enabled on Alder Lake, the switch further enables
> - the AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8, CMPccXADD, ENQCMD
> and UINTR
> - ISA extensions.
> + Based on ISA extensions enabled on Alder Lake, the switch intially
> further
> + enables the AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8 and
> CMPccXADD ISA
> + extensions. Since GCC 13.2, ENQCMD and UINTR are further enabled.
> </li>
> <li>GCC now supports the Intel CPU named Grand Ridge through
> <code>-march=grandridge</code>.
> - Grand Ridge is based on Sierra Forest.
> + Based on Sierra Forest, the switch initially further enables the RAO-INT
> + ISA extensions. Since GCC 13.2, ENQCMD and UINTR are further enabled.
> + Since GCC 13.3, RAO-INT is not enabled.
> </li>
> <li>GCC now supports the Intel CPU named Emerald Rapids through
> <code>-march=emeraldrapids</code>.
> @@ -698,6 +702,9 @@ You may also want to check out our
> Based on Granite Rapids, the switch further enables the AMX-COMPLEX ISA
> extensions.
> </li>
> + <li>Since GCC 13.5, CLDEMOTE is not enabled through the compiler
> + switch <code>-march=alderlake</code>.
> + </li>
> <li>GCC now supports AMD CPUs based on the <code>znver4</code> core
> via <code>-march=znver4</code>. The switch makes GCC consider
> using 512-bit vectors when auto-vectorizing.
> diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html
> index 6be9e55a..1528660b 100644
> --- a/htdocs/gcc-14/changes.html
> +++ b/htdocs/gcc-14/changes.html
> @@ -969,30 +969,38 @@ __asm (".global __flmap_lock" "\n\t"
> <li>GCC now supports the Intel CPU named Clearwater Forest through
> <code>-march=clearwaterforest</code>.
> Based on Sierra Forest, the switch further enables the AVX-VNNI-INT16,
> - PREFETCHI, SHA512, SM3, SM4 and USER_MSR ISA extensions.
> + PREFETCHI, SHA512, SM3, SM4 and USER_MSR ISA extensions. Since GCC
> 14.4,
> + KL and WIDEKL are not enabled.
> </li>
> <li>GCC now supports the Intel CPU named Gracemont through
> <code>-march=gracemont</code>.
> - Gracemont is based on Alder Lake.
> + Gracemont is based on Alder Lake. Since GCC 14.4, CLDEMOTE is not
> enabled.
> </li>
> <li>GCC now supports the Intel CPU named Arrow Lake through
> <code>-march=arrowlake</code>.
> Based on Alder Lake, the switch further enables the AVX-IFMA,
> - AVX-NE-CONVERT, AVX-VNNI-INT8 and CMPccXADD ISA extensions.
> + AVX-NE-CONVERT, AVX-VNNI-INT8 and CMPccXADD ISA extensions. Since
> GCC 14.4,
> + CLDEMOTE is not enabled.
> </li>
> <li>GCC now supports the Intel CPU named Arrow Lake S through
> <code>-march=arrowlake-s</code>.
> Based on Arrow Lake, the switch further enables the AVX-VNNI-INT16,
> SHA512,
> - SM3 and SM4 ISA extensions.
> + SM3 and SM4 ISA extensions. Since GCC 14.4, CLDEMOTE is not enabled.
> </li>
> <li>GCC now supports the Intel CPU named Lunar Lake through
> <code>-march=lunarlake</code>.
> - Lunar Lake is based on Arrow Lake S.
> + Lunar Lake is based on Arrow Lake S. Since GCC 14.4, CLDEMOTE is not
> + enabled.
> </li>
> <li>GCC now supports the Intel CPU named Panther Lake through
> <code>-march=pantherlake</code>.
> - Based on Arrow Lake S, the switch further enables the PREFETCHI ISA
> - extensions.
> + Based on Arrow Lake S, the switch initially further enables the PREFETCHI
> + ISA extensions. Since GCC 14.4, CLDEMOTE, KL, PREFETCHI and WIDEKL are
> + not enabled.
> + </li>
> + <li>Since GCC 14.4, CLDEMOTE is not enabled through the compiler
> + switches <code>-march=alderlake</code>, <code>-
> march=meteorlake</code> and
> + <code>-march=raptorlake</code>.
> </li>
> <li>Xeon Phi CPUs support (a.k.a. Knight Landing and Knight Mill) are
> marked
> as deprecated. GCC will emit a warning when using the
> diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html
> index da702185..edcf567a 100644
> --- a/htdocs/gcc-15/changes.html
> +++ b/htdocs/gcc-15/changes.html
> @@ -1242,10 +1242,21 @@ structure used in <code>core 1.49</code>.
> </li>
> <li>GCC now supports the Intel CPU named Diamond Rapids through
> <code>-march=diamondrapids</code>.
> - Based on ISA extensions enabled on Granite Rapids D, the switch further
> - enables the AMX-AVX512, AMX-FP8, AMX-MOVRS, AMX-TF32, AMX-
> TRANSPOSE, APX_F,
> - AVX10.2, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-
> INT8,
> - CMPccXADD, MOVRS, SHA512, SM3, SM4, and USER_MSR ISA extensions.
> + Based on ISA extensions enabled on Granite Rapids D, the switch initially
> + further enables the AMX-AVX512, AMX-FP8, AMX-MOVRS, AMX-TF32,
> AMX-TRANSPOSE,
> + APX_F, AVX10.2, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-
> VNNI-INT8,
> + CMPccXADD, MOVRS, SHA512, SM3, SM4, and USER_MSR ISA extensions.
> Since
> + GCC 15.2, AMX-TRANSPOSE and USER_MSR are not enabled.
> + </li>
> + <li>Since GCC 15.2, CLDEMOTE is not enabled through the compiler
> + switches <code>-march=alderlake</code>, <code>-
> march=arrowlake</code>,
> + <code>-march=arrowlake-s</code>, <code>-march=gracemont</code>,
> + <code>-march=lunarlake</code>, <code>-march=meteorlake</code>,
> + <code>-march=pantherlake</code> and <code>-march=raptorlake</code>.
> + KL and WIDEKL are not enabled through the compiler switches
> + <code>-march=clearwaterforest</code> and <code>-
> march=pantherlake</code>.
> + PREFETCHI is not enabled through the compiler switch
> + <code>-march=pantherlake</code>.
> </li>
> <li>Support for Xeon Phi CPUs (a.k.a. Knight Landing and Knight Mill) were
> removed in GCC 15. GCC will no longer accept <code>-march=knl</code>,
> diff --git a/htdocs/gcc-16/changes.html b/htdocs/gcc-16/changes.html
> index 82886671..da0e92c4 100644
> --- a/htdocs/gcc-16/changes.html
> +++ b/htdocs/gcc-16/changes.html
> @@ -212,6 +212,34 @@ for general information.</p>
> <h3 id="x86">IA-32/x86-64</h3>
>
> <ul>
> + <li>GCC now supports the Intel CPU named Wildcat Lake through
> + <code>-march=wildcatlake</code>.
> + Wildcat Lake is based on Panther Lake.
> + </li>
> + <li>GCC now supports the Intel CPU named Nova Lake through
> + <code>-march=novalake</code>.
> + Based on ISA extensions enabled on Panther Lake, the switch further
> enables
> + the APX_F, AVX10.1, AVX10.2 and PREFETCHI ISA extensions.
> + </li>
> + <li>Since GCC 16, AMX-TRANSPOSE and USER_MSR are not enabled
> through
> + the compiler switch <code>-march=diamondrapids</code>. CLDEMOTE is
> not
> + enabled through the compiler switches <code>-march=alderlake</code>,
> + <code>-march=arrowlake</code>, <code>-march=arrowlake-s</code>,
> + <code>-march=gracemont</code>, <code>-march=lunarlake</code>,
> + <code>-march=meteorlake</code>, <code>-march=pantherlake</code>
> and
> + <code>-march=raptorlake</code>. KL and WIDEKL are not enabled through
> + the compiler switches <code>-march=clearwaterforest</code> and
> + <code>-march=pantherlake</code>. PREFETCHI is not enabled through the
> + compiler switch <code>-march=pantherlake</code>.
> + </li>
> + <li><code>-mavx10.1-256</code>, <code>-mavx10.1-512</code>, and
> + <code>-mevex512</code> were removed together with the warning for
> the
> + behavior change on <code>-mavx10.1</code>. <code>-mavx10.1</code>
> has
> + enabled AVX10.1 intrinsics with 512-bit vector support since GCC 15.
> + </li>
> + <li>Support for AMX-TRANSPOSE were removed in GCC 16. GCC will no
> longer accept
> + <code>-mamx-transpose</code>,
> + </li>
> <li>The new <code>--enable-x86-64-mfentry</code> configure option
> enables <code>-mfentry</code> which uses <code>__fentry__</code>,
> instead of <code>mcount</code> for profiling on x86-64. This
> --
> 2.31.1
