On 05/09/12 17:01, Christophe Lyon wrote: > Hi, > > This patch implements __builtin_bswap16() on ARM (v6 and above) using > revsh with a signed input and rev16 with an unsigned input. > > It is pretty much equal to the patch posted some time ago > http://gcc.gnu.org/ml/gcc-patches/2012-04/msg00962.html, but it's hard > to write such patterns differently ;-) > > I have added a testcase. > > OK for trunk? > > Christophe.= > >
+(define_insn "*arm_revsh" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (sign_extend:SI (bswap:HI (match_operand:HI 1 "s_register_operand" "r"))))] + "TARGET_32BIT && arm_arch6" + "revsh%?\t%0, %1" + [(set_attr "predicable" "yes") + (set_attr "length" "4")] Can you add additional constraints for the t1 encoding for this and the other TARGET_32BIT patterns. Then the compiler will get the length calculations correct. Something like: (define_insn "*arm_revsh" + [(set (match_operand:SI 0 "s_register_operand" "=l,r") + (sign_extend:SI (bswap:HI (match_operand:HI 1 "s_register_operand" "l,r"))))] "TARGET_32BIT && arm_arch6" "revsh%?\t%0, %1" [(set_attr "predicable" "yes") + (set_attr "arch" "t2,*") + (set_attr "length" "2,4")] Brownie points for retro-fitting this to the existing rev patterns. +(define_expand "bswaphi2" + [(set (match_operand:HI 0 "s_register_operand" "=r") + (bswap:HI (match_operand:HI 1 "s_register_operand" "r")))] Define_expand doesn't take constraints. Finally, these patterns should be grouped with the other byte-reversal patterns in arm.md, not placed at the end of the file. R.
