See https://gcc.gnu.org/pipermail/gcc-patches/2025-September/695920.html for
more detail about the motavation for this set of patches.

This is second patch out of ten that uses the new CPU option framework
to support the target clone feature:

        __attribute__((__target_clones__=("cpu=power9,default")))

I have bootstraped and ran the regression tests for these patches on
both little endian and big endian Power servers.  Can I check these
patches into the trunk?

2025-09-22  Michael Meissner  <[email protected]>

gcc/

        * config/rs6000/rs6000.cc (struct clone_map): Use CPU options instead of
        ISA masks for setting up clone attributes.
        (rs6000_clone_map): Likewise.
        (rs6000_clone_priority): Likewise.
---
 gcc/config/rs6000/rs6000.cc | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a958d03b923..93ed508e02d 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -250,17 +250,17 @@ enum {
 
 /* Map compiler ISA bits into HWCAP names.  */
 struct clone_map {
-  HOST_WIDE_INT isa_mask;      /* rs6000_isa mask */
+  HOST_WIDE_INT cpu_option;    /* CPU options mask */
   const char *name;            /* name to use in __builtin_cpu_supports.  */
 };
 
 static const struct clone_map rs6000_clone_map[CLONE_MAX] = {
   { 0,                         "" },           /* Default options.  */
-  { OPTION_MASK_CMPB,          "arch_2_05" },  /* ISA 2.05 (power6).  */
-  { OPTION_MASK_POPCNTD,       "arch_2_06" },  /* ISA 2.06 (power7).  */
-  { OPTION_MASK_P8_VECTOR,     "arch_2_07" },  /* ISA 2.07 (power8).  */
-  { OPTION_MASK_P9_VECTOR,     "arch_3_00" },  /* ISA 3.0 (power9).  */
-  { OPTION_MASK_POWER10,       "arch_3_1" },   /* ISA 3.1 (power10).  */
+  { CPU_OPTION_POWER6_MASK,    "arch_2_05" },  /* ISA 2.05 (power6).  */
+  { CPU_OPTION_POWER7_MASK,    "arch_2_06" },  /* ISA 2.06 (power7).  */
+  { CPU_OPTION_POWER8_MASK,    "arch_2_07" },  /* ISA 2.07 (power8).  */
+  { CPU_OPTION_POWER9_MASK,    "arch_3_00" },  /* ISA 3.0 (power9).  */
+  { CPU_OPTION_POWER10_MASK,   "arch_3_1" },   /* ISA 3.1 (power10).  */
 };
 
 
@@ -25337,7 +25337,7 @@ static int
 rs6000_clone_priority (tree fndecl)
 {
   tree fn_opts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
-  HOST_WIDE_INT isa_masks;
+  HOST_WIDE_INT cpu_option;
   int ret = CLONE_DEFAULT;
   tree attrs = lookup_attribute ("target", DECL_ATTRIBUTES (fndecl));
   const char *attrs_str = NULL;
@@ -25353,12 +25353,12 @@ rs6000_clone_priority (tree fndecl)
        fn_opts = target_option_default_node;
 
       if (!fn_opts || !TREE_TARGET_OPTION (fn_opts))
-       isa_masks = rs6000_isa_flags;
+       cpu_option = rs6000_cpu_option_flags;
       else
-       isa_masks = TREE_TARGET_OPTION (fn_opts)->x_rs6000_isa_flags;
+       cpu_option = TREE_TARGET_OPTION (fn_opts)->x_rs6000_cpu_option_flags;
 
       for (ret = CLONE_MAX - 1; ret != 0; ret--)
-       if ((rs6000_clone_map[ret].isa_mask & isa_masks) != 0)
+       if ((rs6000_clone_map[ret].cpu_option & cpu_option) != 0)
          break;
     }
 
-- 
2.51.0


-- 
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: [email protected]

Reply via email to