Add the necessary register definitions for PRU, so that asm-hard-reg
tests can pass for PRU.
Pushed to trunk as r16-3839-gd020b73ce00029.
gcc/testsuite/ChangeLog:
* gcc.dg/asm-hard-reg-error-1.c: Enable test for PRU, and define
registers for PRU.
* gcc.dg/asm-hard-reg-error-4.c: Define hard regs for PRU.
* gcc.dg/asm-hard-reg-error-5.c: Ditto.
Signed-off-by: Dimitar Dimitrov <[email protected]>
---
gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c | 7 ++++++-
gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c | 3 +++
gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c | 3 +++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c
b/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c
index 0d7c2f210d8..0a31c8508c7 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-*
riscv*-*-* s390*-*-* x86_64-*-* } } */
+/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-*
pru*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */
#if defined (__aarch64__)
# define GPR1_RAW "x0"
@@ -20,6 +20,11 @@
# define GPR2 "{r5}"
# define GPR3 "{r6}"
# define INVALID_GPR_A "{r33}"
+#elif defined (__PRU__)
+# define GPR1_RAW "r20"
+# define GPR2 "{r21}"
+# define GPR3 "{r22}"
+# define INVALID_GPR_A "{r34}"
#elif defined (__riscv)
# define GPR1_RAW "t4"
# define GPR2 "{t5}"
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
b/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
index d1856ad4818..c1e07c9f930 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c
@@ -8,6 +8,9 @@
#elif defined __AVR__
# define R0 "20"
# define R1 "24"
+#elif defined __PRU__
+# define R0 "0"
+# define R1 "4"
#else
# define R0 "0"
# define R1 "1"
diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
b/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
index 7f538ea9b9e..6588b09c377 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c
@@ -9,6 +9,9 @@
#elif defined __AVR__
# define R0 "20"
# define R1 "24"
+#elif defined __PRU__
+# define R0 "0"
+# define R1 "4"
#else
# define R0 "0"
# define R1 "1"
--
2.51.0
