Hi Surya, Thank you for reviewing the patch!
On Tue, 2025-09-02 at 10:38 +0530, Surya Kumari Jangala wrote: > > > > There is code in the routine expand_shift_1() that checks if the left > shift can be implemented as a sequence of ADDs : > > /* Check whether its cheaper to implement a left shift by a > constant > bit count by a sequence of additions. */ > if (code == LSHIFT_EXPR > && CONST_INT_P (op1) > && INTVAL (op1) > 0 > && INTVAL (op1) < GET_MODE_PRECISION (scalar_mode) > && INTVAL (op1) < MAX_BITS_PER_WORD > && (shift_cost (speed, mode, INTVAL (op1)) > > INTVAL (op1) * add_cost (speed, mode)) > && shift_cost (speed, mode, INTVAL (op1)) != MAX_COST) > > We need to check why this is not working for powerpc. Can the costs > be improved for powerpc to enable replacement of shift by add? I checked the actual costs and looks like the shift_cost and add_cost are the same(4). I do not see a target specific definition for these costs. All I see is this global struct "this_target_expmed" is initialized with "default_target_expmed", where these costs are defined. Ideally in case of powerpc and in vector mode, the shift_cost should be more than add_cost right, since we need to first splat the constant operand into a register and then do the shift. I think this cost is not accounted for. Thank you, Avinash Jayakar
