On 8/19/25 12:59 AM, Richard Biener wrote:
Apart from a missing ChangeLog this LGTM. I would expect this to also
trigger on x86, so I wonder what effect the patch has there on the
testcases you add for riscv?
Fair question. While I'd looked at other targets, particularly those
with interesting properties (such as lack of barrel shifter) to ensure
we weren't doing anything dumb. But I don't recall looking at x86's
codegen!
Most of the time the code is identical. Exceptions:
Selecting between -1, 2^n with an inverted splat. The general change is
we convert and and+sub into a not+or. I doubt this changes performance
in any meaningful way. Though not having to encode the constant for the
AND does result in a space savings in some values of N which can be
handled specially.
Selecting between 0, ~(2^n-1). For various values of N we end up with
more compact code that likely has the same performance profile. In the
N=0 case we do squash out an instruction, but it's just a reg-reg copy.
This did make me notice that two of the testfiles have redundant tests
in them. Those were meant to test specific cases for small constant
handling on RISC-V and didn't need to iterate through a large number of
shift counts. I'll simplify those tests before cobbling together a
ChangeLog and pushing.
THanks!
jeff
