Hi Mike,
On 14/06/25 2:13 pm, Michael Meissner wrote:
> This is patch #4 of 4 to add -mcpu=future support to the PowerPC.
I think this should be a separate patch in itself. As such, this
patch is not required to enable the -mcpu=future option.
>
> In the development for the power10 processor, GCC did not enable using the
> load
> vector pair and store vector pair instructions when optimizing things like
s/things/functions
> memory copy. This patch enables using those instructions if -mcpu=future is
> used.
>
> I have tested these patches on both big endian and little endian PowerPC
> servers, with no regressions. Can I check these patchs into the trunk?
>
> 2025-06-13 Michael Meissner <meiss...@linux.ibm.com>
>
> gcc/
>
> * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Enable using
Just FUTURE_MASKS_SERVER
> load vector pair and store vector pair instructions for memory copy
> operations.
> (POWERPC_MASKS): Make the bit for enabling using load vector pair and
> store vector pair operations set and reset when the PowerPC processor is
> changed.
I think this can be reworded, perhaps something like:
(POWERPC_MASKS): Add the option mask OPTION_MASK_BLOCK_OPS_VECTOR_PAIR.
> * gcc/config/rs6000/rs6000.cc (rs6000_machine_from_flags): Disable
> -mblock-ops-vector-pair from influcing .machine selection.
nit: "influencing"
Also, in rs6000.opt, mblock-ops-vector-pair is marked as Undocumented. Should we
change this?
Regards,
Surya
>
> gcc/testsuite/
>
> * gcc.target/powerpc/future-3.c: New test.
> ---
> gcc/config/rs6000/rs6000-cpus.def | 4 +++-
> gcc/config/rs6000/rs6000.cc | 2 +-
> gcc/testsuite/gcc.target/powerpc/future-3.c | 22 +++++++++++++++++++++
> 3 files changed, 26 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/future-3.c
>
> diff --git a/gcc/config/rs6000/rs6000-cpus.def
> b/gcc/config/rs6000/rs6000-cpus.def
> index 228d0b5e7b5..063591f5c09 100644
> --- a/gcc/config/rs6000/rs6000-cpus.def
> +++ b/gcc/config/rs6000/rs6000-cpus.def
> @@ -84,7 +84,8 @@
> | OPTION_MASK_POWER11)
>
> #define FUTURE_MASKS_SERVER (POWER11_MASKS_SERVER \
> - | OPTION_MASK_FUTURE)
> + | OPTION_MASK_FUTURE \
> + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR)
>
> /* Flags that need to be turned off if -mno-vsx. */
> #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX
> \
> @@ -114,6 +115,7 @@
>
> /* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
> #define POWERPC_MASKS (OPTION_MASK_ALTIVEC
> \
> + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
> | OPTION_MASK_CMPB \
> | OPTION_MASK_CRYPTO \
> | OPTION_MASK_DFP \
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
> index 141d53b1a12..80fc500fcec 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -5907,7 +5907,7 @@ rs6000_machine_from_flags (void)
>
> /* Disable the flags that should never influence the .machine selection.
> */
> flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT |
> OPTION_MASK_ISEL
> - | OPTION_MASK_ALTIVEC);
> + | OPTION_MASK_ALTIVEC | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR);
>
> if ((flags & (FUTURE_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
> return "future";
> diff --git a/gcc/testsuite/gcc.target/powerpc/future-3.c
> b/gcc/testsuite/gcc.target/powerpc/future-3.c
> new file mode 100644
> index 00000000000..afa22228b96
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/future-3.c
> @@ -0,0 +1,22 @@
> +/* 32-bit doesn't generate vector pair instructions. */
> +/* { dg-do compile { target lp64 } } */
> +/* { dg-options "-mdejagnu-cpu=future -O2" } */
> +
> +/* Test to see that memcpy will use load/store vector pair with
> + -mcpu=future. */
> +
> +#ifndef SIZE
> +#define SIZE 4
> +#endif
> +
> +extern vector double to[SIZE], from[SIZE];
> +
> +void
> +copy (void)
> +{
> + __builtin_memcpy (to, from, sizeof (to));
> + return;
> +}
> +
> +/* { dg-final { scan-assembler {\mlxvpx?\M} } } */
> +/* { dg-final { scan-assembler {\mstxvpx?\M} } } */
