VxWorks uses x18 as the TCB, so STATIC_CHAIN_REGNUM has long been set
(in gcc/config/aarch64/aarch64-vxworks.h) to use x9 instead.
This patch marks x18 as fixed on TARGET_VXWORKS, so that it is not
chosen by the register allocator, and adjusts tests that depend on x18
or on the static chain register.
Tested (with gcc-14) on aarch64-vxworks7r2. Ok to install?
for gcc/ChangeLog
* config/aarch64/aarch64.c (aarch64_conditional_register_usage):
Mark x18 as fixed on VxWorks.
for gcc/testsuite/ChangeLog
* gcc.dg/cwsc1.c (CHAIN, aarch64): x9 instead x18 for __vxworks.
* gcc.target/aarch64/reg-alloc-4.c: Drop x18-assigned asm
operand on vxworks.
* gcc.target/aarch64/shadow_call_stack_1.c: Don't expect
-ffixed-x18 error on vxworks.
---
gcc/config/aarch64/aarch64.cc | 8 ++++++++
gcc/testsuite/gcc.dg/cwsc1.c | 6 +++++-
gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c | 2 ++
.../gcc.target/aarch64/shadow_call_stack_1.c | 3 ++-
4 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 1da615c8955a4..3657ee9579df0 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -22039,6 +22039,14 @@ aarch64_conditional_register_usage (void)
fixed_regs[SPECULATION_SCRATCH_REGNUM] = 1;
call_used_regs[SPECULATION_SCRATCH_REGNUM] = 1;
}
+
+#ifdef TARGET_VXWORKS
+ /* R18 is the STATIC_CHAIN_REGNUM on most aarch64 ports, but VxWorks
+ uses it as the TCB, so aarch64-vxworks.h overrides
+ STATIC_CHAIN_REGNUM, and here we mark R18 as fixed. */
+ fixed_regs[R18_REGNUM] = 1;
+ call_used_regs[R18_REGNUM] = 1;
+#endif
}
/* Implement TARGET_MEMBER_TYPE_FORCES_BLK. */
diff --git a/gcc/testsuite/gcc.dg/cwsc1.c b/gcc/testsuite/gcc.dg/cwsc1.c
index e793e26116af4..cccf4139c35b5 100644
--- a/gcc/testsuite/gcc.dg/cwsc1.c
+++ b/gcc/testsuite/gcc.dg/cwsc1.c
@@ -6,7 +6,11 @@
#elif defined(__i386__)
# define CHAIN "%ecx"
#elif defined(__aarch64__)
-# define CHAIN "x18"
+# if defined __vxworks
+# define CHAIN "x9"
+# else
+# define CHAIN "x18"
+# endif
#elif defined(__alpha__)
# define CHAIN "$1"
#elif defined(__arm__)
diff --git a/gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c
b/gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c
index ceb6f50de2dc3..0576dc27eb072 100644
--- a/gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c
+++ b/gcc/testsuite/gcc.target/aarch64/reg-alloc-4.c
@@ -61,7 +61,9 @@ foo (volatile struct L *head, int inc)
"r" (inner->next), /* x15 */
"r" (inner->next), /* x16 */
"r" (inner->next), /* x17 */
+#ifndef __vxworks /* x18 is a fixed register on VxWorks, used for the TCB. */
"r" (inner->next), /* x18 */
+#endif
"r" (inner->next) : /* x30 */
"x19", "x20", "x21", "x22", "x23",
"x24", "x25", "x26", "x27", "x28");
diff --git a/gcc/testsuite/gcc.target/aarch64/shadow_call_stack_1.c
b/gcc/testsuite/gcc.target/aarch64/shadow_call_stack_1.c
index ab68d6e848252..c7c230fc194e8 100644
--- a/gcc/testsuite/gcc.target/aarch64/shadow_call_stack_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/shadow_call_stack_1.c
@@ -3,4 +3,5 @@
int i;
-/* { dg-error "'-fsanitize=shadow-call-stack' requires '-ffixed-x18'" ""
{target "aarch64*-*-*" } 0 } */
+/* aarch64-*-vxworks has x18 as a fixed register. */
+/* { dg-error "'-fsanitize=shadow-call-stack' requires '-ffixed-x18'" "" {
target { aarch64*-*-* && { ! aarch64-*-vxworks* } } } 0 } */
--
Alexandre Oliva, happy hacker https://blog.lx.oliva.nom.br/
Free Software Activist FSFLA co-founder GNU Toolchain Engineer
More tolerance and less prejudice are key for inclusion and diversity.
Excluding neuro-others for not behaving ""normal"" is *not* inclusive!
