On 5/19/25 2:42 AM, Li Xu wrote:
From: xuli <xu...@eswincomputing.com>

This patch adds testcase for form1, as shown below:

void __attribute__((noinline))                                       \
vec_sat_s_add_imm_##T##_fmt_1##_##INDEX (T *out, T *op_1, unsigned limit) \
{                                                                    \
   unsigned i;                                                        \
   for (i = 0; i < limit; i++)                                        \
     {                                                                \
       T x = op_1[i];                                                 \
       T sum = (UT)x + (UT)IMM;                                       \
       out[i] = (x ^ IMM) < 0                                         \
         ? sum                                                        \
         : (sum ^ x) >= 0                                             \
           ? sum                                                      \
           : x < 0 ? MIN : MAX;                                       \
     }                                                                \
}

Passed the rv64gcv regression test.

Signed-off-by: Li Xu <xu...@eswincomputing.com>
gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h: add signed vec 
SAT_ADD IMM form1.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h: add sat_s_add_imm 
data.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i16.c: New test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i32.c: New test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i64.c: New test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-1-i8.c: New test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i16.c: New 
test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i32.c: New 
test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i64.c: New 
test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm-run-1-i8.c: New 
test.
        * 
gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm_type_check-1-i16.c: New test.
        * 
gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm_type_check-1-i32.c: New test.
        * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add_imm_type_check-1-i8.c: 
New test.
Looks reasonably sensible. But I'll defer to Pan here since he's done *far* more work than I in this space.

jeff

Reply via email to