Add rules for lowering `cbranch<mode>4` to CBB<cond>/CBH<cond>/CB<cond> when
CMPBR extension is enabled.
gcc/ChangeLog:
* config/aarch64/aarch64.md (BRANCH_LEN_P_1Kib): New constant.
(BRANCH_LEN_N_1Kib): Likewise.
(cbranch<GPI:mode>4): Emit CMPBR instructions if possible.
(cbranch<SHORT:mode>4): New expand rule.
(*aarch64_cb<GPI:mode>): Likewise.
(*aarch64_cb<SHORT:mode>): Likewise.
* config/aarch64/iterators.md (cmpbr_suffix): New mode attr.
* config/aarch64/predicates.md (const_0_to_63_operand): New
predicate.
(aarch64_cb_immediate): Likewise.
(aarch64_cb_operand): Likewise.
(aarch64_cb_short_operand): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/cmpbr.c: update tests.
---
gcc/config/aarch64/aarch64.md | 87 +++-
gcc/config/aarch64/iterators.md | 5 +
gcc/config/aarch64/predicates.md | 15 +
gcc/testsuite/gcc.target/aarch64/cmpbr.c | 598 ++++++++---------------
4 files changed, 311 insertions(+), 394 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index b61e3e5a72f..0b708f8b2f6 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -697,37 +697,60 @@ (define_insn "jump"
;; Maximum PC-relative positive/negative displacements for various branching
;; instructions.
(define_constants
[
;; +/- 128MiB. Used by B, BL.
(BRANCH_LEN_P_128MiB 134217724)
(BRANCH_LEN_N_128MiB -134217728)
;; +/- 1MiB. Used by B.<cond>, CBZ, CBNZ.
(BRANCH_LEN_P_1MiB 1048572)
(BRANCH_LEN_N_1MiB -1048576)
;; +/- 32KiB. Used by TBZ, TBNZ.
(BRANCH_LEN_P_32KiB 32764)
(BRANCH_LEN_N_32KiB -32768)
+
+ ;; +/- 1KiB. Used by CBB<cond>, CBH<cond>, CB<cond>.
+ (BRANCH_LEN_P_1Kib 1020)
+ (BRANCH_LEN_N_1Kib -1024)
]
)
;; -------------------------------------------------------------------
;; Conditional jumps
;; -------------------------------------------------------------------
-(define_expand "cbranch<mode>4"
+(define_expand "cbranch<GPI:mode>4"
[(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
[(match_operand:GPI 1 "register_operand")
(match_operand:GPI 2 "aarch64_plus_operand")])
(label_ref (match_operand 3))
(pc)))]
""
- "
- operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1],
- operands[2]);
- operands[2] = const0_rtx;
- "
+ {
+ if (TARGET_CMPBR && aarch64_cb_operand (operands[2], <MODE>mode))
+ {
+ emit_jump_insn (gen_aarch64_cb<mode> (operands[0], operands[1],
+ operands[2], operands[3]));
+ DONE;
+ }
+ else
+ {
+ operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]),
+ operands[1], operands[2]);
+ operands[2] = const0_rtx;
+ }
+ }
+)
+
+(define_expand "cbranch<SHORT:mode>4"
+ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+ [(match_operand:SHORT 1 "register_operand")
+ (match_operand:SHORT 2
"aarch64_cb_short_operand")])
+ (label_ref (match_operand 3))
+ (pc)))]
+ "TARGET_CMPBR"
+ ""
)
(define_expand "cbranch<mode>4"
@@ -747,13 +770,65 @@ (define_expand "cbranch<mode>4"
(define_expand "cbranchcc4"
[(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
[(match_operand 1 "cc_register")
(match_operand 2 "const0_operand")])
(label_ref (match_operand 3))
(pc)))]
""
""
)
+;; Emit a `CB<cond> (register)` or `CB<cond> (immediate)` instruction.
+(define_insn "aarch64_cb<GPI:mode>"
+ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+ [(match_operand:GPI 1 "register_operand" "r")
+ (match_operand:GPI 2 "aarch64_cb_operand" "ri")])
+ (label_ref (match_operand 3))
+ (pc)))]
+ "TARGET_CMPBR"
+ "cb%m0\\t%<w>1, %<w>2, %l3";
+ [(set_attr "type" "branch")
+ (set (attr "length")
+ (if_then_else (and (ge (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_N_1Kib))
+ (lt (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_P_1Kib)))
+ (const_int 4)
+ (const_int 8)))
+ (set (attr "far_branch")
+ (if_then_else (and (ge (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_N_1Kib))
+ (lt (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_P_1Kib)))
+ (const_string "no")
+ (const_string "yes")))]
+)
+
+;; Emit a `CBB<cond> (register)` or `CBH<cond> (register)` instruction.
+(define_insn "aarch64_cb<SHORT:mode>"
+ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+ [(match_operand:SHORT 1 "register_operand" "r")
+ (match_operand:SHORT 2 "aarch64_cb_short_operand"
"rZ")])
+ (label_ref (match_operand 3))
+ (pc)))]
+ "TARGET_CMPBR"
+ "cb<SHORT:cmpbr_suffix>%m0\\t%<w>1, %<w>2, %l3"
+ [(set_attr "type" "branch")
+ (set (attr "length")
+ (if_then_else (and (ge (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_N_1Kib))
+ (lt (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_P_1Kib)))
+ (const_int 4)
+ (const_int 8)))
+ (set (attr "far_branch")
+ (if_then_else (and (ge (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_N_1Kib))
+ (lt (minus (match_dup 3) (pc))
+ (const_int BRANCH_LEN_P_1Kib)))
+ (const_string "no")
+ (const_string "yes")))]
+)
+
;; Emit `B<cond>`, assuming that the condition is already in the CC register.
(define_insn "aarch64_bcond"
[(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 146453b0516..5c4db3fc109 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -2879,6 +2879,11 @@ (define_code_attr cmp_op [(lt "lt")
(geu "hs")
(gtu "hi")])
+(define_mode_attr cmpbr_suffix [(QI "b")
+ (HI "h")
+ (SI "")
+ (DI "")])
+
(define_code_attr fix_trunc_optab [(fix "fix_trunc")
(unsigned_fix "fixuns_trunc")])
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 1ab1c696c62..7dffe7ab110 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -50,6 +50,10 @@ (define_predicate "const_0_to_7_operand"
(and (match_code "const_int")
(match_test "IN_RANGE (INTVAL (op), 0, 7)")))
+(define_predicate "const_0_to_63_operand"
+ (and (match_code "const_int")
+ (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
+
(define_predicate "const_0_to_4_step_4_operand"
(and (match_code "const_int")
(match_test "IN_RANGE (INTVAL (op), 0, 4)")
@@ -130,6 +134,17 @@ (define_predicate "aarch64_reg_or_xor_imm"
(and (match_code "const_vector")
(match_test "aarch64_simd_valid_xor_imm (op)"))))
+(define_predicate "aarch64_cb_immediate"
+ (match_operand 0 "const_0_to_63_operand"))
+
+(define_predicate "aarch64_cb_operand"
+ (ior (match_operand 0 "register_operand")
+ (match_operand 0 "aarch64_cb_immediate")))
+
+(define_predicate "aarch64_cb_short_operand"
+ (ior (match_operand 0 "register_operand")
+ (match_operand 0 "const0_operand")))
+
(define_predicate "aarch64_fp_compare_operand"
(ior (match_operand 0 "register_operand")
(and (match_code "const_double")
diff --git a/gcc/testsuite/gcc.target/aarch64/cmpbr.c
b/gcc/testsuite/gcc.target/aarch64/cmpbr.c
index 8534283bc26..f97b8026efe 100644
--- a/gcc/testsuite/gcc.target/aarch64/cmpbr.c
+++ b/gcc/testsuite/gcc.target/aarch64/cmpbr.c
@@ -85,1575 +85,1397 @@ COMPARE_ALL(u32, i32, 4098);
COMPARE_ALL(u64, i64, 4098);
/*
** u8_x0_eq_x1:
-** and w1, w1, 255
-** cmp w1, w0, uxtb
-** beq .L4
+** cbbeq w1, w0, .L4
** b not_taken
** b taken
*/
/*
** u8_x0_ne_x1:
-** and w1, w1, 255
-** cmp w1, w0, uxtb
-** beq .L6
+** cbbeq w1, w0, .L6
** b taken
** b not_taken
*/
/*
** u8_x0_ult_x1:
-** and w1, w1, 255
-** cmp w1, w0, uxtb
-** bls .L8
+** cbbls w1, w0, .L8
** b taken
** b not_taken
*/
/*
** u8_x0_ule_x1:
-** and w1, w1, 255
-** cmp w1, w0, uxtb
-** bcc .L10
+** cbbcc w1, w0, .L10
** b taken
** b not_taken
*/
/*
** u8_x0_ugt_x1:
-** and w1, w1, 255
-** cmp w1, w0, uxtb
-** bcs .L12
+** cbbcs w1, w0, .L12
** b taken
** b not_taken
*/
/*
** u8_x0_uge_x1:
-** and w1, w1, 255
-** cmp w1, w0, uxtb
-** bhi .L14
+** cbbhi w1, w0, .L14
** b taken
** b not_taken
*/
/*
** i8_x0_slt_x1:
-** sxtb w1, w1
-** cmp w1, w0, sxtb
-** ble .L16
+** cbble w1, w0, .L16
** b taken
** b not_taken
*/
/*
** i8_x0_sle_x1:
-** sxtb w1, w1
-** cmp w1, w0, sxtb
-** blt .L18
+** cbblt w1, w0, .L18
** b taken
** b not_taken
*/
/*
** i8_x0_sgt_x1:
-** sxtb w1, w1
-** cmp w1, w0, sxtb
-** bge .L20
+** cbbge w1, w0, .L20
** b taken
** b not_taken
*/
/*
** i8_x0_sge_x1:
-** sxtb w1, w1
-** cmp w1, w0, sxtb
-** bgt .L22
+** cbbgt w1, w0, .L22
** b taken
** b not_taken
*/
/*
** u16_x0_eq_x1:
-** and w1, w1, 65535
-** cmp w1, w0, uxth
-** beq .L25
+** cbheq w1, w0, .L25
** b not_taken
** b taken
*/
/*
** u16_x0_ne_x1:
-** and w1, w1, 65535
-** cmp w1, w0, uxth
-** beq .L27
+** cbheq w1, w0, .L27
** b taken
** b not_taken
*/
/*
** u16_x0_ult_x1:
-** and w1, w1, 65535
-** cmp w1, w0, uxth
-** bls .L29
+** cbhls w1, w0, .L29
** b taken
** b not_taken
*/
/*
** u16_x0_ule_x1:
-** and w1, w1, 65535
-** cmp w1, w0, uxth
-** bcc .L31
+** cbhcc w1, w0, .L31
** b taken
** b not_taken
*/
/*
** u16_x0_ugt_x1:
-** and w1, w1, 65535
-** cmp w1, w0, uxth
-** bcs .L33
+** cbhcs w1, w0, .L33
** b taken
** b not_taken
*/
/*
** u16_x0_uge_x1:
-** and w1, w1, 65535
-** cmp w1, w0, uxth
-** bhi .L35
+** cbhhi w1, w0, .L35
** b taken
** b not_taken
*/
/*
** i16_x0_slt_x1:
-** sxth w1, w1
-** cmp w1, w0, sxth
-** ble .L37
+** cbhle w1, w0, .L37
** b taken
** b not_taken
*/
/*
** i16_x0_sle_x1:
-** sxth w1, w1
-** cmp w1, w0, sxth
-** blt .L39
+** cbhlt w1, w0, .L39
** b taken
** b not_taken
*/
/*
** i16_x0_sgt_x1:
-** sxth w1, w1
-** cmp w1, w0, sxth
-** bge .L41
+** cbhge w1, w0, .L41
** b taken
** b not_taken
*/
/*
** i16_x0_sge_x1:
-** sxth w1, w1
-** cmp w1, w0, sxth
-** bgt .L43
+** cbhgt w1, w0, .L43
** b taken
** b not_taken
*/
/*
** u32_x0_eq_x1:
-** cmp w0, w1
-** beq .L46
+** cbeq w0, w1, .L46
** b not_taken
** b taken
*/
/*
** u32_x0_ne_x1:
-** cmp w0, w1
-** beq .L48
+** cbeq w0, w1, .L48
** b taken
** b not_taken
*/
/*
** u32_x0_ult_x1:
-** cmp w0, w1
-** bcs .L50
+** cbcs w0, w1, .L50
** b taken
** b not_taken
*/
/*
** u32_x0_ule_x1:
-** cmp w0, w1
-** bhi .L52
+** cbhi w0, w1, .L52
** b taken
** b not_taken
*/
/*
** u32_x0_ugt_x1:
-** cmp w0, w1
-** bls .L54
+** cbls w0, w1, .L54
** b taken
** b not_taken
*/
/*
** u32_x0_uge_x1:
-** cmp w0, w1
-** bcc .L56
+** cbcc w0, w1, .L56
** b taken
** b not_taken
*/
/*
** i32_x0_slt_x1:
-** cmp w0, w1
-** bge .L58
+** cbge w0, w1, .L58
** b taken
** b not_taken
*/
/*
** i32_x0_sle_x1:
-** cmp w0, w1
-** bgt .L60
+** cbgt w0, w1, .L60
** b taken
** b not_taken
*/
/*
** i32_x0_sgt_x1:
-** cmp w0, w1
-** ble .L62
+** cble w0, w1, .L62
** b taken
** b not_taken
*/
/*
** i32_x0_sge_x1:
-** cmp w0, w1
-** blt .L64
+** cblt w0, w1, .L64
** b taken
** b not_taken
*/
/*
** u64_x0_eq_x1:
-** cmp x0, x1
-** beq .L67
+** cbeq x0, x1, .L67
** b not_taken
** b taken
*/
/*
** u64_x0_ne_x1:
-** cmp x0, x1
-** beq .L69
+** cbeq x0, x1, .L69
** b taken
** b not_taken
*/
/*
** u64_x0_ult_x1:
-** cmp x0, x1
-** bcs .L71
+** cbcs x0, x1, .L71
** b taken
** b not_taken
*/
/*
** u64_x0_ule_x1:
-** cmp x0, x1
-** bhi .L73
+** cbhi x0, x1, .L73
** b taken
** b not_taken
*/
/*
** u64_x0_ugt_x1:
-** cmp x0, x1
-** bls .L75
+** cbls x0, x1, .L75
** b taken
** b not_taken
*/
/*
** u64_x0_uge_x1:
-** cmp x0, x1
-** bcc .L77
+** cbcc x0, x1, .L77
** b taken
** b not_taken
*/
/*
** i64_x0_slt_x1:
-** cmp x0, x1
-** bge .L79
+** cbge x0, x1, .L79
** b taken
** b not_taken
*/
/*
** i64_x0_sle_x1:
-** cmp x0, x1
-** bgt .L81
+** cbgt x0, x1, .L81
** b taken
** b not_taken
*/
/*
** i64_x0_sgt_x1:
-** cmp x0, x1
-** ble .L83
+** cble x0, x1, .L83
** b taken
** b not_taken
*/
/*
** i64_x0_sge_x1:
-** cmp x0, x1
-** blt .L85
+** cblt x0, x1, .L85
** b taken
** b not_taken
*/
/*
** u32_x0_eq_42:
-** cmp w0, 42
-** beq .L88
+** cbeq w0, 42, .L88
** b not_taken
** b taken
*/
/*
** u32_x0_ne_42:
-** cmp w0, 42
-** beq .L90
+** cbeq w0, 42, .L90
** b taken
** b not_taken
*/
/*
** u32_x0_ult_42:
-** cmp w0, 41
-** bhi .L92
+** cbhi w0, 41, .L92
** b taken
** b not_taken
*/
/*
** u32_x0_ule_42:
-** cmp w0, 42
-** bhi .L94
+** cbhi w0, 42, .L94
** b taken
** b not_taken
*/
/*
** u32_x0_ugt_42:
-** cmp w0, 42
-** bls .L96
+** cbls w0, 42, .L96
** b taken
** b not_taken
*/
/*
** u32_x0_uge_42:
-** cmp w0, 41
-** bls .L98
+** cbls w0, 41, .L98
** b taken
** b not_taken
*/
/*
** i32_x0_slt_42:
-** cmp w0, 41
-** bgt .L100
+** cbgt w0, 41, .L100
** b taken
** b not_taken
*/
/*
** i32_x0_sle_42:
-** cmp w0, 42
-** bgt .L102
+** cbgt w0, 42, .L102
** b taken
** b not_taken
*/
/*
** i32_x0_sgt_42:
-** cmp w0, 42
-** ble .L104
+** cble w0, 42, .L104
** b taken
** b not_taken
*/
/*
** i32_x0_sge_42:
-** cmp w0, 41
-** ble .L106
+** cble w0, 41, .L106
** b taken
** b not_taken
*/
/*
** u64_x0_eq_42:
-** cmp x0, 42
-** beq .L109
+** cbeq x0, 42, .L109
** b not_taken
** b taken
*/
/*
** u64_x0_ne_42:
-** cmp x0, 42
-** beq .L111
+** cbeq x0, 42, .L111
** b taken
** b not_taken
*/
/*
** u64_x0_ult_42:
-** cmp x0, 41
-** bhi .L113
+** cbhi x0, 41, .L113
** b taken
** b not_taken
*/
/*
** u64_x0_ule_42:
-** cmp x0, 42
-** bhi .L115
+** cbhi x0, 42, .L115
** b taken
** b not_taken
*/
/*
** u64_x0_ugt_42:
-** cmp x0, 42
-** bls .L117
+** cbls x0, 42, .L117
** b taken
** b not_taken
*/
/*
** u64_x0_uge_42:
-** cmp x0, 41
-** bls .L119
+** cbls x0, 41, .L119
** b taken
** b not_taken
*/
/*
** i64_x0_slt_42:
-** cmp x0, 41
-** bgt .L121
+** cbgt x0, 41, .L121
** b taken
** b not_taken
*/
/*
** i64_x0_sle_42:
-** cmp x0, 42
-** bgt .L123
+** cbgt x0, 42, .L123
** b taken
** b not_taken
*/
/*
** i64_x0_sgt_42:
-** cmp x0, 42
-** ble .L125
+** cble x0, 42, .L125
** b taken
** b not_taken
*/
/*
** i64_x0_sge_42:
-** cmp x0, 41
-** ble .L127
+** cble x0, 41, .L127
** b taken
** b not_taken
*/
/*
** u8_x0_eq_0:
-** tst w0, 255
-** bne .L129
+** cbbne w0, wzr, .L129
** b taken
** b not_taken
*/
/*
** u8_x0_ne_0:
-** tst w0, 255
-** beq .L131
+** cbbeq w0, wzr, .L131
** b taken
** b not_taken
*/
/*
** u8_x0_ult_0:
** b not_taken
*/
/*
** u8_x0_ule_0:
-** tst w0, 255
-** bne .L134
+** cbbne w0, wzr, .L134
** b taken
** b not_taken
*/
/*
** u8_x0_ugt_0:
-** tst w0, 255
-** beq .L136
+** cbbeq w0, wzr, .L136
** b taken
** b not_taken
*/
/*
** u8_x0_uge_0:
** b taken
*/
/*
** i8_x0_slt_0:
-** tbnz w0, 7, .L140
+** cbblt w0, wzr, .L140
** b not_taken
** b taken
*/
/*
** i8_x0_sle_0:
-** sxtb w0, w0
-** cmp w0, 0
-** ble .L143
+** cbble w0, wzr, .L143
** b not_taken
** b taken
*/
/*
** i8_x0_sgt_0:
-** sxtb w0, w0
-** cmp w0, 0
-** ble .L145
+** cbble w0, wzr, .L145
** b taken
** b not_taken
*/
/*
** i8_x0_sge_0:
-** tbnz w0, 7, .L147
+** cbblt w0, wzr, .L147
** b taken
** b not_taken
*/
/*
** u16_x0_eq_0:
-** tst w0, 65535
-** bne .L149
+** cbhne w0, wzr, .L149
** b taken
** b not_taken
*/
/*
** u16_x0_ne_0:
-** tst w0, 65535
-** beq .L151
+** cbheq w0, wzr, .L151
** b taken
** b not_taken
*/
/*
** u16_x0_ult_0:
** b not_taken
*/
/*
** u16_x0_ule_0:
-** tst w0, 65535
-** bne .L154
+** cbhne w0, wzr, .L154
** b taken
** b not_taken
*/
/*
** u16_x0_ugt_0:
-** tst w0, 65535
-** beq .L156
+** cbheq w0, wzr, .L156
** b taken
** b not_taken
*/
/*
** u16_x0_uge_0:
** b taken
*/
/*
** i16_x0_slt_0:
-** tbnz w0, 15, .L160
+** cbhlt w0, wzr, .L160
** b not_taken
** b taken
*/
/*
** i16_x0_sle_0:
-** sxth w0, w0
-** cmp w0, 0
-** ble .L163
+** cbhle w0, wzr, .L163
** b not_taken
** b taken
*/
/*
** i16_x0_sgt_0:
-** sxth w0, w0
-** cmp w0, 0
-** ble .L165
+** cbhle w0, wzr, .L165
** b taken
** b not_taken
*/
/*
** i16_x0_sge_0:
-** tbnz w0, 15, .L167
+** cbhlt w0, wzr, .L167
** b taken
** b not_taken
*/
/*
** u32_x0_eq_0:
-** cbnz w0, .L169
+** cbne w0, wzr, .L169
** b taken
** b not_taken
*/
/*
** u32_x0_ne_0:
-** cbz w0, .L171
+** cbeq w0, wzr, .L171
** b taken
** b not_taken
*/
/*
** u32_x0_ult_0:
** b not_taken
*/
/*
** u32_x0_ule_0:
-** cbnz w0, .L174
+** cbne w0, wzr, .L174
** b taken
** b not_taken
*/
/*
** u32_x0_ugt_0:
-** cbz w0, .L176
+** cbeq w0, wzr, .L176
** b taken
** b not_taken
*/
/*
** u32_x0_uge_0:
** b taken
*/
/*
** i32_x0_slt_0:
-** tbnz w0, #31, .L180
+** cblt w0, wzr, .L180
** b not_taken
** b taken
*/
/*
** i32_x0_sle_0:
-** cmp w0, 0
-** ble .L183
+** cble w0, wzr, .L183
** b not_taken
** b taken
*/
/*
** i32_x0_sgt_0:
-** cmp w0, 0
-** ble .L185
+** cble w0, wzr, .L185
** b taken
** b not_taken
*/
/*
** i32_x0_sge_0:
-** tbnz w0, #31, .L187
+** cblt w0, wzr, .L187
** b taken
** b not_taken
*/
/*
** u64_x0_eq_0:
-** cbnz x0, .L189
+** cbne x0, xzr, .L189
** b taken
** b not_taken
*/
/*
** u64_x0_ne_0:
-** cbz x0, .L191
+** cbeq x0, xzr, .L191
** b taken
** b not_taken
*/
/*
** u64_x0_ult_0:
** b not_taken
*/
/*
** u64_x0_ule_0:
-** cbnz x0, .L194
+** cbne x0, xzr, .L194
** b taken
** b not_taken
*/
/*
** u64_x0_ugt_0:
-** cbz x0, .L196
+** cbeq x0, xzr, .L196
** b taken
** b not_taken
*/
/*
** u64_x0_uge_0:
** b taken
*/
/*
** i64_x0_slt_0:
-** tbnz x0, #63, .L200
+** cblt x0, xzr, .L200
** b not_taken
** b taken
*/
/*
** i64_x0_sle_0:
-** cmp x0, 0
-** ble .L203
+** cble x0, xzr, .L203
** b not_taken
** b taken
*/
/*
** i64_x0_sgt_0:
-** cmp x0, 0
-** ble .L205
+** cble x0, xzr, .L205
** b taken
** b not_taken
*/
/*
** i64_x0_sge_0:
-** tbnz x0, #63, .L207
+** cblt x0, xzr, .L207
** b taken
** b not_taken
*/
/*
** u8_x0_eq_42:
-** and w0, w0, 255
-** cmp w0, 42
-** beq .L210
+** mov w1, 42
+** cbbeq w0, w1, .L210
** b not_taken
** b taken
*/
/*
** u8_x0_ne_42:
-** and w0, w0, 255
-** cmp w0, 42
-** beq .L212
+** mov w1, 42
+** cbbeq w0, w1, .L212
** b taken
** b not_taken
*/
/*
** u8_x0_ult_42:
-** and w0, w0, 255
-** cmp w0, 41
-** bhi .L214
+** mov w1, 41
+** cbbhi w0, w1, .L214
** b taken
** b not_taken
*/
/*
** u8_x0_ule_42:
-** and w0, w0, 255
-** cmp w0, 42
-** bhi .L216
+** mov w1, 42
+** cbbhi w0, w1, .L216
** b taken
** b not_taken
*/
/*
** u8_x0_ugt_42:
-** and w0, w0, 255
-** cmp w0, 42
-** bls .L218
+** mov w1, 42
+** cbbls w0, w1, .L218
** b taken
** b not_taken
*/
/*
** u8_x0_uge_42:
-** and w0, w0, 255
-** cmp w0, 41
-** bls .L220
+** mov w1, 41
+** cbbls w0, w1, .L220
** b taken
** b not_taken
*/
/*
** i8_x0_slt_42:
-** sxtb w0, w0
-** cmp w0, 41
-** bgt .L222
+** mov w1, 41
+** cbbgt w0, w1, .L222
** b taken
** b not_taken
*/
/*
** i8_x0_sle_42:
-** sxtb w0, w0
-** cmp w0, 42
-** bgt .L224
+** mov w1, 42
+** cbbgt w0, w1, .L224
** b taken
** b not_taken
*/
/*
** i8_x0_sgt_42:
-** sxtb w0, w0
-** cmp w0, 42
-** ble .L226
+** mov w1, 42
+** cbble w0, w1, .L226
** b taken
** b not_taken
*/
/*
** i8_x0_sge_42:
-** sxtb w0, w0
-** cmp w0, 41
-** ble .L228
+** mov w1, 41
+** cbble w0, w1, .L228
** b taken
** b not_taken
*/
/*
** u16_x0_eq_42:
-** and w0, w0, 65535
-** cmp w0, 42
-** beq .L231
+** mov w1, 42
+** cbheq w0, w1, .L231
** b not_taken
** b taken
*/
/*
** u16_x0_ne_42:
-** and w0, w0, 65535
-** cmp w0, 42
-** beq .L233
+** mov w1, 42
+** cbheq w0, w1, .L233
** b taken
** b not_taken
*/
/*
** u16_x0_ult_42:
-** and w0, w0, 65535
-** cmp w0, 41
-** bhi .L235
+** mov w1, 41
+** cbhhi w0, w1, .L235
** b taken
** b not_taken
*/
/*
** u16_x0_ule_42:
-** and w0, w0, 65535
-** cmp w0, 42
-** bhi .L237
+** mov w1, 42
+** cbhhi w0, w1, .L237
** b taken
** b not_taken
*/
/*
** u16_x0_ugt_42:
-** and w0, w0, 65535
-** cmp w0, 42
-** bls .L239
+** mov w1, 42
+** cbhls w0, w1, .L239
** b taken
** b not_taken
*/
/*
** u16_x0_uge_42:
-** and w0, w0, 65535
-** cmp w0, 41
-** bls .L241
+** mov w1, 41
+** cbhls w0, w1, .L241
** b taken
** b not_taken
*/
/*
** i16_x0_slt_42:
-** sxth w0, w0
-** cmp w0, 41
-** bgt .L243
+** mov w1, 41
+** cbhgt w0, w1, .L243
** b taken
** b not_taken
*/
/*
** i16_x0_sle_42:
-** sxth w0, w0
-** cmp w0, 42
-** bgt .L245
+** mov w1, 42
+** cbhgt w0, w1, .L245
** b taken
** b not_taken
*/
/*
** i16_x0_sgt_42:
-** sxth w0, w0
-** cmp w0, 42
-** ble .L247
+** mov w1, 42
+** cbhle w0, w1, .L247
** b taken
** b not_taken
*/
/*
** i16_x0_sge_42:
-** sxth w0, w0
-** cmp w0, 41
-** ble .L249
+** mov w1, 41
+** cbhle w0, w1, .L249
** b taken
** b not_taken
*/
/*
** u8_x0_eq_64:
-** and w0, w0, 255
-** cmp w0, 64
-** beq .L252
+** mov w1, 64
+** cbbeq w0, w1, .L252
** b not_taken
** b taken
*/
/*
** u8_x0_ne_64:
-** and w0, w0, 255
-** cmp w0, 64
-** beq .L254
+** mov w1, 64
+** cbbeq w0, w1, .L254
** b taken
** b not_taken
*/
/*
** u8_x0_ult_64:
-** and w0, w0, 255
-** cmp w0, 63
-** bhi .L256
+** mov w1, 63
+** cbbhi w0, w1, .L256
** b taken
** b not_taken
*/
/*
** u8_x0_ule_64:
-** and w0, w0, 255
-** cmp w0, 64
-** bhi .L258
+** mov w1, 64
+** cbbhi w0, w1, .L258
** b taken
** b not_taken
*/
/*
** u8_x0_ugt_64:
-** and w0, w0, 255
-** cmp w0, 64
-** bls .L260
+** mov w1, 64
+** cbbls w0, w1, .L260
** b taken
** b not_taken
*/
/*
** u8_x0_uge_64:
-** and w0, w0, 255
-** cmp w0, 63
-** bls .L262
+** mov w1, 63
+** cbbls w0, w1, .L262
** b taken
** b not_taken
*/
/*
** i8_x0_slt_64:
-** sxtb w0, w0
-** cmp w0, 63
-** bgt .L264
+** mov w1, 63
+** cbbgt w0, w1, .L264
** b taken
** b not_taken
*/
/*
** i8_x0_sle_64:
-** sxtb w0, w0
-** cmp w0, 64
-** bgt .L266
+** mov w1, 64
+** cbbgt w0, w1, .L266
** b taken
** b not_taken
*/
/*
** i8_x0_sgt_64:
-** sxtb w0, w0
-** cmp w0, 64
-** ble .L268
+** mov w1, 64
+** cbble w0, w1, .L268
** b taken
** b not_taken
*/
/*
** i8_x0_sge_64:
-** sxtb w0, w0
-** cmp w0, 63
-** ble .L270
+** mov w1, 63
+** cbble w0, w1, .L270
** b taken
** b not_taken
*/
/*
** u16_x0_eq_64:
-** and w0, w0, 65535
-** cmp w0, 64
-** beq .L273
+** mov w1, 64
+** cbheq w0, w1, .L273
** b not_taken
** b taken
*/
/*
** u16_x0_ne_64:
-** and w0, w0, 65535
-** cmp w0, 64
-** beq .L275
+** mov w1, 64
+** cbheq w0, w1, .L275
** b taken
** b not_taken
*/
/*
** u16_x0_ult_64:
-** and w0, w0, 65535
-** cmp w0, 63
-** bhi .L277
+** mov w1, 63
+** cbhhi w0, w1, .L277
** b taken
** b not_taken
*/
/*
** u16_x0_ule_64:
-** and w0, w0, 65535
-** cmp w0, 64
-** bhi .L279
+** mov w1, 64
+** cbhhi w0, w1, .L279
** b taken
** b not_taken
*/
/*
** u16_x0_ugt_64:
-** and w0, w0, 65535
-** cmp w0, 64
-** bls .L281
+** mov w1, 64
+** cbhls w0, w1, .L281
** b taken
** b not_taken
*/
/*
** u16_x0_uge_64:
-** and w0, w0, 65535
-** cmp w0, 63
-** bls .L283
+** mov w1, 63
+** cbhls w0, w1, .L283
** b taken
** b not_taken
*/
/*
** i16_x0_slt_64:
-** sxth w0, w0
-** cmp w0, 63
-** bgt .L285
+** mov w1, 63
+** cbhgt w0, w1, .L285
** b taken
** b not_taken
*/
/*
** i16_x0_sle_64:
-** sxth w0, w0
-** cmp w0, 64
-** bgt .L287
+** mov w1, 64
+** cbhgt w0, w1, .L287
** b taken
** b not_taken
*/
/*
** i16_x0_sgt_64:
-** sxth w0, w0
-** cmp w0, 64
-** ble .L289
+** mov w1, 64
+** cbhle w0, w1, .L289
** b taken
** b not_taken
*/
/*
** i16_x0_sge_64:
-** sxth w0, w0
-** cmp w0, 63
-** ble .L291
+** mov w1, 63
+** cbhle w0, w1, .L291
** b taken
** b not_taken
*/
/*
** u32_x0_eq_64:
** cmp w0, 64
** beq .L294
** b not_taken
** b taken
*/
/*
** u32_x0_ne_64:
** cmp w0, 64
** beq .L296
** b taken
** b not_taken
*/
/*
** u32_x0_ult_64:
-** cmp w0, 63
-** bhi .L298
+** cbhi w0, 63, .L298
** b taken
** b not_taken
*/
/*
** u32_x0_ule_64:
** cmp w0, 64
** bhi .L300
** b taken
** b not_taken
*/
/*
** u32_x0_ugt_64:
** cmp w0, 64
** bls .L302
** b taken
** b not_taken
*/
/*
** u32_x0_uge_64:
-** cmp w0, 63
-** bls .L304
+** cbls w0, 63, .L304
** b taken
** b not_taken
*/
/*
** i32_x0_slt_64:
-** cmp w0, 63
-** bgt .L306
+** cbgt w0, 63, .L306
** b taken
** b not_taken
*/
/*
** i32_x0_sle_64:
** cmp w0, 64
** bgt .L308
** b taken
** b not_taken
*/
/*
** i32_x0_sgt_64:
** cmp w0, 64
** ble .L310
** b taken
** b not_taken
*/
/*
** i32_x0_sge_64:
-** cmp w0, 63
-** ble .L312
+** cble w0, 63, .L312
** b taken
** b not_taken
*/
/*
** u64_x0_eq_64:
** cmp x0, 64
** beq .L315
** b not_taken
** b taken
*/
/*
** u64_x0_ne_64:
** cmp x0, 64
** beq .L317
** b taken
** b not_taken
*/
/*
** u64_x0_ult_64:
-** cmp x0, 63
-** bhi .L319
+** cbhi x0, 63, .L319
** b taken
** b not_taken
*/
/*
** u64_x0_ule_64:
** cmp x0, 64
** bhi .L321
** b taken
** b not_taken
*/
/*
** u64_x0_ugt_64:
** cmp x0, 64
** bls .L323
** b taken
** b not_taken
*/
/*
** u64_x0_uge_64:
-** cmp x0, 63
-** bls .L325
+** cbls x0, 63, .L325
** b taken
** b not_taken
*/
/*
** i64_x0_slt_64:
-** cmp x0, 63
-** bgt .L327
+** cbgt x0, 63, .L327
** b taken
** b not_taken
*/
/*
** i64_x0_sle_64:
** cmp x0, 64
** bgt .L329
** b taken
** b not_taken
*/
/*
** i64_x0_sgt_64:
** cmp x0, 64
** ble .L331
** b taken
** b not_taken
*/
/*
** i64_x0_sge_64:
-** cmp x0, 63
-** ble .L333
+** cble x0, 63, .L333
** b taken
** b not_taken
*/
/*
** u16_x0_eq_4098:
** mov w1, 4098
-** cmp w1, w0, uxth
-** beq .L336
+** cbheq w0, w1, .L336
** b not_taken
** b taken
*/
/*
** u16_x0_ne_4098:
** mov w1, 4098
-** cmp w1, w0, uxth
-** beq .L338
+** cbheq w0, w1, .L338
** b taken
** b not_taken
*/
/*
** u16_x0_ult_4098:
** mov w1, 4097
-** cmp w1, w0, uxth
-** bcc .L340
+** cbhhi w0, w1, .L340
** b taken
** b not_taken
*/
/*
** u16_x0_ule_4098:
** mov w1, 4098
-** cmp w1, w0, uxth
-** bcc .L342
+** cbhhi w0, w1, .L342
** b taken
** b not_taken
*/
/*
** u16_x0_ugt_4098:
** mov w1, 4098
-** cmp w1, w0, uxth
-** bcs .L344
+** cbhls w0, w1, .L344
** b taken
** b not_taken
*/
/*
** u16_x0_uge_4098:
** mov w1, 4097
-** cmp w1, w0, uxth
-** bcs .L346
+** cbhls w0, w1, .L346
** b taken
** b not_taken
*/
/*
** i16_x0_slt_4098:
** mov w1, 4097
-** cmp w1, w0, sxth
-** blt .L348
+** cbhgt w0, w1, .L348
** b taken
** b not_taken
*/
/*
** i16_x0_sle_4098:
** mov w1, 4098
-** cmp w1, w0, sxth
-** blt .L350
+** cbhgt w0, w1, .L350
** b taken
** b not_taken
*/
/*
** i16_x0_sgt_4098:
** mov w1, 4098
-** cmp w1, w0, sxth
-** bge .L352
+** cbhle w0, w1, .L352
** b taken
** b not_taken
*/
/*
** i16_x0_sge_4098:
** mov w1, 4097
-** cmp w1, w0, sxth
-** bge .L354
+** cbhle w0, w1, .L354
** b taken
** b not_taken
*/
/*
** u32_x0_eq_4098:
** mov w1, 4098
-** cmp w0, w1
-** beq .L357
+** cbeq w0, w1, .L357
** b not_taken
** b taken
*/
/*
** u32_x0_ne_4098:
** mov w1, 4098
-** cmp w0, w1
-** beq .L359
+** cbeq w0, w1, .L359
** b taken
** b not_taken
*/
/*
** u32_x0_ult_4098:
** mov w1, 4097
-** cmp w0, w1
-** bhi .L361
+** cbhi w0, w1, .L361
** b taken
** b not_taken
*/
/*
** u32_x0_ule_4098:
** mov w1, 4098
-** cmp w0, w1
-** bhi .L363
+** cbhi w0, w1, .L363
** b taken
** b not_taken
*/
/*
** u32_x0_ugt_4098:
** mov w1, 4098
-** cmp w0, w1
-** bls .L365
+** cbls w0, w1, .L365
** b taken
** b not_taken
*/
/*
** u32_x0_uge_4098:
** mov w1, 4097
-** cmp w0, w1
-** bls .L367
+** cbls w0, w1, .L367
** b taken
** b not_taken
*/
/*
** i32_x0_slt_4098:
** mov w1, 4097
-** cmp w0, w1
-** bgt .L369
+** cbgt w0, w1, .L369
** b taken
** b not_taken
*/
/*
** i32_x0_sle_4098:
** mov w1, 4098
-** cmp w0, w1
-** bgt .L371
+** cbgt w0, w1, .L371
** b taken
** b not_taken
*/
/*
** i32_x0_sgt_4098:
** mov w1, 4098
-** cmp w0, w1
-** ble .L373
+** cble w0, w1, .L373
** b taken
** b not_taken
*/
/*
** i32_x0_sge_4098:
** mov w1, 4097
-** cmp w0, w1
-** ble .L375
+** cble w0, w1, .L375
** b taken
** b not_taken
*/
/*
** u64_x0_eq_4098:
** mov x1, 4098
-** cmp x0, x1
-** beq .L378
+** cbeq x0, x1, .L378
** b not_taken
** b taken
*/
/*
** u64_x0_ne_4098:
** mov x1, 4098
-** cmp x0, x1
-** beq .L380
+** cbeq x0, x1, .L380
** b taken
** b not_taken
*/
/*
** u64_x0_ult_4098:
** mov x1, 4097
-** cmp x0, x1
-** bhi .L382
+** cbhi x0, x1, .L382
** b taken
** b not_taken
*/
/*
** u64_x0_ule_4098:
** mov x1, 4098
-** cmp x0, x1
-** bhi .L384
+** cbhi x0, x1, .L384
** b taken
** b not_taken
*/
/*
** u64_x0_ugt_4098:
** mov x1, 4098
-** cmp x0, x1
-** bls .L386
+** cbls x0, x1, .L386
** b taken
** b not_taken
*/
/*
** u64_x0_uge_4098:
** mov x1, 4097
-** cmp x0, x1
-** bls .L388
+** cbls x0, x1, .L388
** b taken
** b not_taken
*/
/*
** i64_x0_slt_4098:
** mov x1, 4097
-** cmp x0, x1
-** bgt .L390
+** cbgt x0, x1, .L390
** b taken
** b not_taken
*/
/*
** i64_x0_sle_4098:
** mov x1, 4098
-** cmp x0, x1
-** bgt .L392
+** cbgt x0, x1, .L392
** b taken
** b not_taken
*/
/*
** i64_x0_sgt_4098:
** mov x1, 4098
-** cmp x0, x1
-** ble .L394
+** cble x0, x1, .L394
** b taken
** b not_taken
*/
/*
** i64_x0_sge_4098:
** mov x1, 4097
-** cmp x0, x1
-** ble .L396
+** cble x0, x1, .L396
** b taken
** b not_taken
*/
--
2.45.2
