The `far_branch` attribute only ever takes the values 0 or 1, so make it
a `no/yes` valued string attribute instead.
gcc/ChangeLog:
* config/aarch64/aarch64.md (far_branch): Replace 0/1 with
no/yes.
(aarch64_bcond): Handle rename.
(aarch64_cbz<optab><mode>1): Likewise.
(*aarch64_tbz<optab><mode>1): Likewise.
(@aarch64_tbz<optab><ALLI:mode><GPI:mode>): Likewise.
---
gcc/config/aarch64/aarch64.md | 22 ++++++++++------------
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c31ad4fc16e..b61e3e5a72f 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -554,16 +554,14 @@ (define_attr "mode_enabled" "false,true"
;; Attribute that controls whether an alternative is enabled or not.
(define_attr "enabled" "no,yes"
(if_then_else (and (eq_attr "arch_enabled" "yes")
(eq_attr "mode_enabled" "true"))
(const_string "yes")
(const_string "no")))
;; Attribute that specifies whether we are dealing with a branch to a
;; label that is far away, i.e. further away than the maximum/minimum
;; representable in a signed 21-bits number.
-;; 0 :=: no
-;; 1 :=: yes
-(define_attr "far_branch" "" (const_int 0))
+(define_attr "far_branch" "no,yes" (const_string "no"))
;; Attribute that specifies whether the alternative uses MOVPRFX.
(define_attr "movprfx" "no,yes" (const_string "no"))
@@ -759,45 +757,45 @@ (define_expand "cbranchcc4"
;; Emit `B<cond>`, assuming that the condition is already in the CC register.
(define_insn "aarch64_bcond"
[(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
[(match_operand 1 "cc_register")
(const_int 0)])
(label_ref (match_operand 2))
(pc)))]
""
{
/* GCC's traditional style has been to use "beq" instead of "b.eq", etc.,
but the "." is required for SVE conditions. */
bool use_dot_p = GET_MODE (operands[1]) == CC_NZCmode;
if (get_attr_length (insn) == 8)
return aarch64_gen_far_branch (operands, 2, "Lbcond",
use_dot_p ? "b.%M0\\t" : "b%M0\\t");
else
return use_dot_p ? "b.%m0\\t%l2" : "b%m0\\t%l2";
}
[(set_attr "type" "branch")
(set (attr "length")
(if_then_else (and (ge (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_N_1MiB))
(lt (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_P_1MiB)))
(const_int 4)
(const_int 8)))
(set (attr "far_branch")
(if_then_else (and (ge (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_N_1MiB))
(lt (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_P_1MiB)))
- (const_int 0)
- (const_int 1)))]
+ (const_string "no")
+ (const_string "yes")))]
)
;; For a 24-bit immediate CST we can optimize the compare for equality
;; and branch sequence from:
;; mov x0, #imm1
;; movk x0, #imm2, lsl 16 /* x0 contains CST. */
;; cmp x1, x0
;; b<ne,eq> .Label
;; into the shorter:
;; sub x0, x1, #(CST & 0xfff000)
;; subs x0, x0, #(CST & 0x000fff)
;; b<ne,eq> .Label
@@ -829,77 +827,77 @@ (define_insn_and_split "*aarch64_bcond_wide_imm<GPI:mode>"
;; For an EQ/NE comparison against zero, emit `CBZ`/`CBNZ`
(define_insn "aarch64_cbz<optab><mode>1"
[(set (pc) (if_then_else (EQL (match_operand:GPI 0 "register_operand" "r")
(const_int 0))
(label_ref (match_operand 1))
(pc)))]
"!aarch64_track_speculation"
{
if (get_attr_length (insn) == 8)
return aarch64_gen_far_branch (operands, 1, "Lcb", "<inv_cb>\\t%<w>0, ");
else
return "<cbz>\\t%<w>0, %l1";
}
[(set_attr "type" "branch")
(set (attr "length")
(if_then_else (and (ge (minus (match_dup 1) (pc))
(const_int BRANCH_LEN_N_1MiB))
(lt (minus (match_dup 1) (pc))
(const_int BRANCH_LEN_P_1MiB)))
(const_int 4)
(const_int 8)))
(set (attr "far_branch")
(if_then_else (and (ge (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_N_1MiB))
(lt (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_P_1MiB)))
- (const_int 0)
- (const_int 1)))]
+ (const_string "no")
+ (const_string "yes")))]
)
;; For an LT/GE comparison against zero, emit `TBZ`/`TBNZ`
(define_insn "*aarch64_tbz<optab><mode>1"
[(set (pc) (if_then_else (LTGE (match_operand:ALLI 0 "register_operand" "r")
(const_int 0))
(label_ref (match_operand 1))
(pc)))
(clobber (reg:CC CC_REGNUM))]
"!aarch64_track_speculation"
{
if (get_attr_length (insn) == 8)
{
- if (get_attr_far_branch (insn) == 1)
+ if (get_attr_far_branch (insn) == FAR_BRANCH_YES)
return aarch64_gen_far_branch (operands, 1, "Ltb",
"<inv_tb>\\t%<w>0, <sizem1>, ");
else
{
char buf[64];
uint64_t val = ((uint64_t) 1)
<< (GET_MODE_SIZE (<MODE>mode) * BITS_PER_UNIT - 1);
sprintf (buf, "tst\t%%<w>0, %" PRId64, val);
output_asm_insn (buf, operands);
return "<bcond>\t%l1";
}
}
else
return "<tbz>\t%<w>0, <sizem1>, %l1";
}
[(set_attr "type" "branch")
(set (attr "length")
(if_then_else (and (ge (minus (match_dup 1) (pc))
(const_int BRANCH_LEN_N_32KiB))
(lt (minus (match_dup 1) (pc))
(const_int BRANCH_LEN_P_32KiB)))
(const_int 4)
(const_int 8)))
(set (attr "far_branch")
(if_then_else (and (ge (minus (match_dup 1) (pc))
(const_int BRANCH_LEN_N_1MiB))
(lt (minus (match_dup 1) (pc))
(const_int BRANCH_LEN_P_1MiB)))
- (const_int 0)
- (const_int 1)))]
+ (const_string "no")
+ (const_string "yes")))]
)
;; -------------------------------------------------------------------
;; Test bit and branch
;; -------------------------------------------------------------------
@@ -925,44 +923,44 @@ (define_expand "tbranch_<code><mode>3"
(define_insn "@aarch64_tbz<optab><ALLI:mode><GPI:mode>"
[(set (pc) (if_then_else (EQL
(zero_extract:GPI
(match_operand:ALLI 0 "register_operand" "r")
(const_int 1)
(match_operand 1
"aarch64_simd_shift_imm_<ALLI:mode>" "n"))
(const_int 0))
(label_ref (match_operand 2))
(pc)))
(clobber (reg:CC CC_REGNUM))]
"!aarch64_track_speculation"
{
if (get_attr_length (insn) == 8)
{
if (get_attr_far_branch (insn) == 1)
return aarch64_gen_far_branch (operands, 2, "Ltb",
"<inv_tb>\\t%<ALLI:w>0, %1, ");
else
{
operands[1] = GEN_INT (HOST_WIDE_INT_1U << UINTVAL (operands[1]));
return "tst\t%<ALLI:w>0, %1\;<bcond>\t%l2";
}
}
else
return "<tbz>\t%<ALLI:w>0, %1, %l2";
}
[(set_attr "type" "branch")
(set (attr "length")
(if_then_else (and (ge (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_N_32KiB))
(lt (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_P_32KiB)))
(const_int 4)
(const_int 8)))
(set (attr "far_branch")
(if_then_else (and (ge (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_N_1MiB))
(lt (minus (match_dup 2) (pc))
(const_int BRANCH_LEN_P_1MiB)))
- (const_int 0)
- (const_int 1)))]
+ (const_string "no")
+ (const_string "yes")))]
)
--
2.45.2
