From: Pan Li <pan2...@intel.com>
Given we will put all vx combine for int8 in a single file,
we need to make sure the generate function for different
types and ops has different function name. Thus, refactor
the test helper macros for avoiding possible function name
conflict.
The below test suites are passed for this patch series.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add
type and op name to generate test function name.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Refine the
test helper macros to avoid conflict.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h: Ditto.
Signed-off-by: Pan Li <pan2...@intel.com>
---
.../riscv/rvv/autovec/vx_vf/vx-1-i16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-i32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-i64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-i8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-u16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-u32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-u64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-1-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-i16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-i32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-i64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-i8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-u16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-u32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-u64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-2-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-i16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-i32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-i64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-i8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-u16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-u32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-u64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-3-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-i16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-i32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-i64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-i8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-u16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-u32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-u64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-4-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-i16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-i32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-i64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-i8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-u16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-u32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-u64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-5-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-i16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-i32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-i64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-i8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-u16.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-u32.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-u64.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx-6-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx_binary.h | 50 +++++++++++--------
.../riscv/rvv/autovec/vx_vf/vx_binary_run.h | 2 +-
.../rvv/autovec/vx_vf/vx_vadd-run-1-i16.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-i32.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-i64.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-i8.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-u16.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-u32.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-u64.c | 9 ++--
.../rvv/autovec/vx_vf/vx_vadd-run-1-u8.c | 9 ++--
58 files changed, 117 insertions(+), 103 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
index 6de21a874db..af93deef79b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
index f46be7ac8d6..0cde8ba916b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
index 2b57b289e84..78d131e577a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
index e1392845c66..2d3408d3cad 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
index 0266d44164e..fda04f53eb1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint16_t, +)
+DEF_VX_BINARY_CASE_0(uint16_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
index c5417330973..ae4b364e6cc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint32_t, +)
+DEF_VX_BINARY_CASE_0(uint32_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
index e9e21628a99..9c195ea476e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint64_t, +)
+DEF_VX_BINARY_CASE_0(uint64_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
index da71fff2c40..13de5e2641a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint8_t, +)
+DEF_VX_BINARY_CASE_0(uint8_t, +, add)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
index b40d0b86df6..b7a5a105337 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
index af3a40d56ac..77ce9ab782b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
index 5f7c51c2fc4..ade54d346eb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
index 420cf0e29a1..9bef0ef10d1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
index 7741d06bfa5..52c92a7b359 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint16_t, +)
+DEF_VX_BINARY_CASE_0(uint16_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
index 10ff20ef136..1ef2bf87b1b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint32_t, +)
+DEF_VX_BINARY_CASE_0(uint32_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
index fa5ab40e9ad..4ca2aa73600 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint64_t, +)
+DEF_VX_BINARY_CASE_0(uint64_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
index 0374e1f0b4b..663cfa2082d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint8_t, +)
+DEF_VX_BINARY_CASE_0(uint8_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
index f7669070d6c..7acd8697247 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
index 1b47a59c9f3..8476c1bd3b8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
index 92ab1e8530e..37ee24f3e1a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
index 444707e0134..678c994a01c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
index e3fc112dfa3..30be625343d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint16_t, +)
+DEF_VX_BINARY_CASE_0(uint16_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
index f76971bbb76..e32d16bf59e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint32_t, +)
+DEF_VX_BINARY_CASE_0(uint32_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
index 09a4b42d880..6bef1a0f7b9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint64_t, +)
+DEF_VX_BINARY_CASE_0(uint64_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
index 5a0679fc2bf..e468f223e39 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_0(uint8_t, +)
+DEF_VX_BINARY_CASE_0(uint8_t, +, add)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
index 9a26601165e..deae3765318 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int16_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
index 55b51fc0ec7..05021156391 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
index 8ad60982ff6..27796b55e58 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
index 193e0205b53..d43a680be02 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
index a093fca9637..0f8baf912af 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint16_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
index 9f5843b12aa..017cf9055b6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
index 0f00688ae93..87c19c927d0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
index 47707e87ae2..093961938bc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
index e5ec8884fc7..7f40b4b86f7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
index ed6c22d059f..c8d23c7c93f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
index ef44012e418..219293b8c97 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
index d61f9dfbb2b..00944475cd1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
index 3d1ba7f0742..723ac6132d1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
index 2e9862be6b2..08d1467b551 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
index 72e6786a0a5..1b1b4468cbd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
index e935be1552c..c7639716db8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
index d80f0c07d55..78f630f9e2b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(int16_t, +, add, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
index 99f6614eb7e..e7ea3011688 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(int32_t, +, add, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
index ab06c51914b..699c70fc289 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(int64_t, +, add, VX_BINARY_BODY)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
index 7ead9d09b79..a8218aa14ce 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(int8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(int8_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
index 79b754b934a..21fc913cdc1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c
@@ -4,6 +4,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint16_t, +, VX_BINARY_BODY_X8)
+DEF_VX_BINARY_CASE_1(uint16_t, +, add, VX_BINARY_BODY_X8)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
index 2f70dcd1197..11cce3a95ac 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint32_t, +, VX_BINARY_BODY_X4)
+DEF_VX_BINARY_CASE_1(uint32_t, +, add, VX_BINARY_BODY_X4)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
index 8094a2cc7fb..7114349f58d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint64_t, +, VX_BINARY_BODY)
+DEF_VX_BINARY_CASE_1(uint64_t, +, add, VX_BINARY_BODY)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
index 56d040b2f86..f4b45cb2ebc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY_CASE_1(uint8_t, +, VX_BINARY_BODY_X16)
+DEF_VX_BINARY_CASE_1(uint8_t, +, add, VX_BINARY_BODY_X16)
/* { dg-final { scan-assembler {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
index db802bdefd7..f46210924ea 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
@@ -3,16 +3,20 @@
#include <stdint.h>
-#define DEF_VX_BINARY_CASE_0(T, OP) \
-void \
-test_vx_binary_case_0 (T * restrict out, T * restrict in, T x, unsigned n) \
-{ \
- for (unsigned i = 0; i < n; i++) \
- out[i] = in[i] OP x; \
+#define DEF_VX_BINARY_CASE_0(T, OP, NAME) \
+void \
+test_vx_binary_##NAME##_##T##_case_0 (T * restrict out, T * restrict in, \
+ T x, unsigned n) \
+{ \
+ for (unsigned i = 0; i < n; i++) \
+ out[i] = in[i] OP x; \
}
-#define DEF_VX_BINARY_CASE_0_WRAP(T, OP) DEF_VX_BINARY_CASE_0(T, OP)
-#define RUN_VX_BINARY_CASE_0(out, in, x, n) test_vx_binary_case_0(out,
in, x, n)
-#define RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n) RUN_VX_BINARY_CASE_0(out, in,
x, n)
+#define DEF_VX_BINARY_CASE_0_WRAP(T, OP, NAME) \
+ DEF_VX_BINARY_CASE_0(T, OP, NAME)
+#define RUN_VX_BINARY_CASE_0(T, NAME, out, in, x, n) \
+ test_vx_binary_##NAME##_##T##_case_0(out, in, x, n)
+#define RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n) \
+ RUN_VX_BINARY_CASE_0(T, NAME, out, in, x, n)
#define VX_BINARY_BODY(op) \
out[k + 0] = in[k + 0] op tmp; \
@@ -43,19 +47,21 @@ test_vx_binary_case_0 (T * restrict out, T * restrict in, T
x, unsigned n) \
VX_BINARY_BODY_X64(op) \
VX_BINARY_BODY_X64(op)
-#define DEF_VX_BINARY_CASE_1(T, OP, BODY) \
-void \
-test_vx_binary_case_1 (T * restrict out, T * restrict in, T x, unsigned n) \
-{ \
- unsigned k = 0; \
- T tmp = x + 3; \
- \
- while (k < n) \
- { \
- tmp = tmp ^ 0x3f; \
- BODY(OP) \
- } \
+#define DEF_VX_BINARY_CASE_1(T, OP, NAME, BODY) \
+void \
+test_vx_binary_##NAME##_##T##_case_1 (T * restrict out, T * restrict in, \
+ T x, unsigned n) \
+{ \
+ unsigned k = 0; \
+ T tmp = x + 3; \
+ \
+ while (k < n) \
+ { \
+ tmp = tmp ^ 0x3f; \
+ BODY(OP) \
+ } \
}
-#define DEF_VX_BINARY_CASE_1_WRAP(T, OP, BODY) DEF_VX_BINARY_CASE_1(T, OP,
BODY)
+#define DEF_VX_BINARY_CASE_1_WRAP(T, OP, NAME, BODY) \
+ DEF_VX_BINARY_CASE_1(T, OP, NAME, BODY)
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
index bb35184fa72..3c00dbb6989 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
@@ -13,7 +13,7 @@ main ()
T *in = TEST_DATA[i][1];
T *expect = TEST_DATA[i][2];
- TEST_RUN (out, in, x, N);
+ TEST_RUN (T, NAME, out, in, x, N);
for (k = 0; k < N; k++)
if (out[k] != expect[k])
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
index 306ad762f9e..bd164954a9c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int16_t
+#define T int16_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
index 6ccdf7abdc2..4330905fb20 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int32_t
+#define T int32_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
index 9484aa8d002..95f0a2eda19 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int64_t
+#define T int64_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
index aeb330e84f7..a76cbab6df2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T int8_t
+#define T int8_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
index dafaa298b36..7d6da172afb 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint16_t
+#define T uint16_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
index 6b285c87f70..339b1ae0e57 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint32_t
+#define T uint32_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
index eeee4e10d87..aefec86c151 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint64_t
+#define T uint64_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
index 22d7a0e42e8..d8e8c26c9c3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
@@ -4,11 +4,12 @@
#include "vx_binary.h"
#include "vx_binary_data.h"
-#define T uint8_t
+#define T uint8_t
+#define NAME add
-DEF_VX_BINARY_CASE_0_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +, NAME)
-#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME,
out, in, x, n)
#include "vx_binary_run.h"
--
2.43.0
