Hi Robin,
I am not sure if we have some options additional to below, like -march=generic,
to ensure that the late-combine will take action as expected in testcases.
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
Pan
-----Original Message-----
From: Li, Pan2 <[email protected]>
Sent: Thursday, April 17, 2025 3:31 PM
To: [email protected]
Cc: [email protected]; [email protected]; [email protected];
[email protected]; Chen, Ken <[email protected]>; Liu, Hongtao
<[email protected]>; Li, Pan2 <[email protected]>
Subject: [PATCH 3/3][GCC16-Stage-1] RISC-V: Add testcases for vec_duplicate +
vadd.vv combine to vadd.vx
From: Pan Li <[email protected]>
Add asm dump check and run test for vec_duplicate + vadd.vv combine
to vadd.vx. Introduce new folder to hold all related testcases.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add new folder vx_vf for all
vec_dup + vv to vx testcases.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c: New test.
Signed-off-by: Pan Li <[email protected]>
---
.../riscv/rvv/autovec/vx_vf/vx_binary.h | 17 +
.../riscv/rvv/autovec/vx_vf/vx_binary_data.h | 401 ++++++++++++++++++
.../riscv/rvv/autovec/vx_vf/vx_binary_run.h | 26 ++
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c | 8 +
.../riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c | 8 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-i16.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-i32.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-i64.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-i8.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-u16.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-u32.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-u64.c | 14 +
.../rvv/autovec/vx_vf/vx_vadd-run-1-u8.c | 14 +
gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 +
20 files changed, 622 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
new file mode 100644
index 00000000000..66654eb9022
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
@@ -0,0 +1,17 @@
+#ifndef HAVE_DEFINED_VX_VF_BINARY_H
+#define HAVE_DEFINED_VX_VF_BINARY_H
+
+#include <stdint.h>
+
+#define DEF_VX_BINARY(T, OP) \
+void \
+test_vx_binary (T * restrict out, T * restrict in, T x, unsigned n) \
+{ \
+ for (unsigned i = 0; i < n; i++) \
+ out[i] = in[i] OP x; \
+}
+#define DEF_VX_BINARY_WRAP(T, OP) DEF_VX_BINARY(T, OP)
+#define RUN_VX_BINARY(out, in, x, n) test_vx_binary(out, in, x, n)
+#define RUN_VX_BINARY_WRAP(out, in, x, n) RUN_VX_BINARY(out, in, x, n)
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
new file mode 100644
index 00000000000..11a32cbbf0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
@@ -0,0 +1,401 @@
+#ifndef HAVE_DEFINED_VX_BINARY_DATA_H
+#define HAVE_DEFINED_VX_BINARY_DATA_H
+
+#define N 16
+
+#define TEST_BINARY_DATA(T, NAME) test_##T##_##NAME##_data
+#define TEST_BINARY_DATA_WRAP(T, NAME) TEST_BINARY_DATA(T, NAME)
+
+int8_t TEST_BINARY_DATA(int8_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ },
+ {
+ { 127 },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -128, -128, -128, -128,
+ -2, -2, -2, -2,
+ },
+ {
+ 127, 127, 127, 127,
+ 126, 126, 126, 126,
+ -1, -1, -1, -1,
+ 125, 125, 125, 125,
+ },
+ },
+ {
+ { -128 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 127, 127, 127, 127,
+ 2, 2, 2, 2,
+ },
+ {
+ -128, -128, -128, -128,
+ -127, -127, -127, -127,
+ -1, -1, -1, -1,
+ -126, -126, -126, -126,
+ },
+ },
+};
+
+int16_t TEST_BINARY_DATA(int16_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ },
+ {
+ { 32767 },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -32768, -32768, -32768, -32768,
+ -2, -2, -2, -2,
+ },
+ {
+ 32767, 32767, 32767, 32767,
+ 32766, 32766, 32766, 32766,
+ -1, -1, -1, -1,
+ 32765, 32765, 32765, 32765,
+ },
+ },
+ {
+ { -32768 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 32767, 32767, 32767, 32767,
+ 2, 2, 2, 2,
+ },
+ {
+ -32768, -32768, -32768, -32768,
+ -32767, -32767, -32767, -32767,
+ -1, -1, -1, -1,
+ -32766, -32766, -32766, -32766,
+ },
+ },
+};
+
+int32_t TEST_BINARY_DATA(int32_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ },
+ {
+ { 2147483647 },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2, -2, -2, -2,
+ },
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483646, 2147483646, 2147483646, 2147483646,
+ -1, -1, -1, -1,
+ 2147483645, 2147483645, 2147483645, 2147483645,
+ },
+ },
+ {
+ { -2147483648 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2, 2, 2, 2,
+ },
+ {
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483647, -2147483647, -2147483647, -2147483647,
+ -1, -1, -1, -1,
+ -2147483646, -2147483646, -2147483646, -2147483646,
+ },
+ },
+};
+
+int64_t TEST_BINARY_DATA(int64_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ -2, -2, -2, -2,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ },
+ },
+ {
+ { 9223372036854775807ll },
+ {
+ 0, 0,
0, 0,
+ -1, -1,
-1, -1,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ -2, -2,
-2, -2,
+ },
+ {
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
9223372036854775807ll,
+ 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
9223372036854775806ll,
+ -1, -1, -1,
-1,
+ 9223372036854775805ll, 9223372036854775805ll, 9223372036854775805ll,
9223372036854775805ll,
+ },
+ },
+ {
+ { -9223372036854775808ull },
+ {
+ 0, 0, 0,
0,
+ 1, 1, 1,
1,
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
9223372036854775807ll,
+ 2, 2, 2,
2,
+ },
+ {
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ -9223372036854775807ll, -9223372036854775807ll,
-9223372036854775807ll, -9223372036854775807ll,
+ -1, -1,
-1, -1,
+ -9223372036854775806ll, -9223372036854775806ll,
-9223372036854775806ll, -9223372036854775806ll,
+ },
+ },
+};
+
+uint8_t TEST_BINARY_DATA(uint8_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ },
+ {
+ { 127 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ },
+ {
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ 254, 254, 254, 254,
+ 255, 255, 255, 255,
+ },
+ },
+ {
+ { 253 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 255, 255, 255, 255,
+ },
+ {
+ 253, 253, 253, 253,
+ 254, 254, 254, 254,
+ 255, 255, 255, 255,
+ 252, 252, 252, 252,
+ },
+ },
+};
+
+uint16_t TEST_BINARY_DATA(uint16_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ },
+ {
+ { 32767 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 32767, 32767, 32767, 32767,
+ 32768, 32768, 32768, 32768,
+ },
+ {
+ 32767, 32767, 32767, 32767,
+ 32768, 32768, 32768, 32768,
+ 65534, 65534, 65534, 65534,
+ 65535, 65535, 65535, 65535,
+ },
+ },
+ {
+ { 65533 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 65535, 65535, 65535, 65535,
+ },
+ {
+ 65533, 65533, 65533, 65533,
+ 65534, 65534, 65534, 65534,
+ 65535, 65535, 65535, 65535,
+ 65532, 65532, 65532, 65532,
+ },
+ },
+};
+
+uint32_t TEST_BINARY_DATA(uint32_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ },
+ {
+ { 2147483647 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483648, 2147483648, 2147483648, 2147483648,
+ },
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483648, 2147483648, 2147483648, 2147483648,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ },
+ },
+ {
+ { 4294967293 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ },
+ {
+ 4294967293, 4294967293, 4294967293, 4294967293,
+ 4294967294, 4294967294, 4294967294, 4294967294,
+ 4294967295, 4294967295, 4294967295, 4294967295,
+ 4294967292, 4294967292, 4294967292, 4294967292,
+ },
+ },
+};
+
+uint64_t TEST_BINARY_DATA(uint64_t, vadd)[][3][N] =
+{
+ {
+ { 1 },
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ 11, 11, 11, 11,
+ 9, 9, 9, 9,
+ },
+ {
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ 12, 12, 12, 12,
+ 10, 10, 10, 10,
+ },
+ },
+ {
+ { 9223372036854775807ull },
+ {
+ 0, 0, 0,
0,
+ 1, 1, 1,
1,
+ 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull,
9223372036854775807ull,
+ 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull,
9223372036854775808ull,
+ },
+ {
+ 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull,
9223372036854775807ull,
+ 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull,
9223372036854775808ull,
+ 18446744073709551614ull, 18446744073709551614ull,
18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ },
+ },
+ {
+ { 18446744073709551613ull },
+ {
+ 0, 0,
0, 0,
+ 1, 1,
1, 1,
+ 2, 2,
2, 2,
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ },
+ {
+ 18446744073709551613ull, 18446744073709551613ull,
18446744073709551613ull, 18446744073709551613ull,
+ 18446744073709551614ull, 18446744073709551614ull,
18446744073709551614ull, 18446744073709551614ull,
+ 18446744073709551615ull, 18446744073709551615ull,
18446744073709551615ull, 18446744073709551615ull,
+ 18446744073709551612ull, 18446744073709551612ull,
18446744073709551612ull, 18446744073709551612ull,
+ },
+ },
+};
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
new file mode 100644
index 00000000000..bb35184fa72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_run.h
@@ -0,0 +1,26 @@
+#ifndef HAVE_DEFINED_VX_BINARY_RUN_H
+#define HAVE_DEFINED_VX_BINARY_RUN_H
+
+int
+main ()
+{
+ unsigned i, k;
+ T out[N];
+
+ for (i = 0; i < sizeof (TEST_DATA) / sizeof (TEST_DATA[0]); i++)
+ {
+ T x = TEST_DATA[i][0][0];
+ T *in = TEST_DATA[i][1];
+ T *expect = TEST_DATA[i][2];
+
+ TEST_RUN (out, in, x, N);
+
+ for (k = 0; k < N; k++)
+ if (out[k] != expect[k])
+ __builtin_abort ();
+ }
+
+ return 0;
+}
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
new file mode 100644
index 00000000000..83423c06570
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(int16_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
new file mode 100644
index 00000000000..eee008ddbad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(int32_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
new file mode 100644
index 00000000000..96d41385c99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(int64_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
new file mode 100644
index 00000000000..cd8e3af2722
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(int8_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
new file mode 100644
index 00000000000..d0b0a2b5cb8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(uint16_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
new file mode 100644
index 00000000000..8345ab8316a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(uint32_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
new file mode 100644
index 00000000000..4b7dace0514
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(uint64_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
new file mode 100644
index 00000000000..8958aa1efb6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "vx_binary.h"
+
+DEF_VX_BINARY(uint8_t, +)
+
+/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
new file mode 100644
index 00000000000..8840f27ead0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int16_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
new file mode 100644
index 00000000000..6ce1becf61c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int32_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
new file mode 100644
index 00000000000..1a77ab4a226
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int64_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
new file mode 100644
index 00000000000..474d1f0648a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T int8_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
new file mode 100644
index 00000000000..b180852902c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint16_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
new file mode 100644
index 00000000000..63d3ca04684
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint32_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
new file mode 100644
index 00000000000..4a7597603ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint64_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
new file mode 100644
index 00000000000..9b929263d75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
@@ -0,0 +1,14 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T uint8_t
+
+DEF_VX_BINARY_WRAP(T, +)
+
+#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index 3824997c908..4283d12ccb5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -130,6 +130,8 @@ foreach op $AUTOVEC_TEST_OPTS {
"$op" ""
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/sat/*.\[cS\]]] \
"$op" ""
+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/vx_vf/*.\[cS\]]]
\
+ "$op" ""
}
# All done.
--
2.43.0
