On 2/14/25 9:38 AM, Alexey Merzlyakov wrote:
It fixes one of the PR108016 mis-optimization.
The patch adjusts expanding for __builtin_add/sub_overflow() on RV64 targets
to avoid unnecessary sext.w instructions.
It replaces expanded for ADD/SUB_OVERFLOW code:
r141:SI=r139:DI#0+r140:DI#0 .. r143:DI=sign_extend(r141:SI)
to the followong kind of chain ->
r143:DI=sign_extend(r139:DI#0+r140:DI#0) .. r141:SI=r143:DI#0
so that sign_extend(a:SI+b:SI) to be emitted as addw (or subw) instruction,
while output r141:SI register will be placed at the end of chain without
extra dependencies, and thus could be easily optimized-out by further pipeline.
gcc/ChangeLog:
* config/riscv/riscv.md (addv<mode>4, uaddv<mode>4, subv<mode>4,
usubv<mode>4): Tunes for unnecessary sext.w elimination.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr108016.c: New test.
Looks pretty good. While it fixes a bug, we're actually in stage4 of
the development cycle. So with some exceptions we require the bug to be
a regression relative to earlier releases.
We tend to make exceptions for cases where the code is incorrect or we
trigger an ICE, SEGV and the like. I don't think this meets the typical
exceptions.
So it needs to wait before integrating. I've put it in the deferred
queue, but I've also put it in my tester. Both actions will help ensure
it's not forgotten once gcc-16 development opens.
Thanks,
jeff
