Hi, Kito:
The reason is not the patch set itself. Must merge Jiawei and Shihua's patches first that are

[PATCH V2] RISC-V: Update Xsfvqmacc and Xsfvfnrclip extension's testcases. <https://gcc.gnu.org/pipermail/gcc-patches/2024-December/671330.html> and [PATCH v3 1/2] RISC-V: Update Xsfvfnrclip implementation. <https://gcc.gnu.org/pipermail/gcc-patches/2024-December/671586.html>
After that, this patch set will be merged successfully.

在 2025/1/10 15:20, Kito Cheng 写道:
Could you rebase and send the patch set again? I can't apply the patch set:

[kitoc@hsinchu18 gcc]$ git am
/tmp/git-pw8sm7zbop/RISC-V-Add-intrinsics-support-and-testcases-for-SiFive-Xsfvcp-extension..patch
Applying: RISC-V: Add intrinsics support for SiFive Xsfvcp extensions.
error: patch failed: gcc/config/riscv/riscv-vector-builtins-types.def:369
error: gcc/config/riscv/riscv-vector-builtins-types.def: patch does not apply
error: patch failed: gcc/config/riscv/riscv-vector-builtins.cc:3600
error: gcc/config/riscv/riscv-vector-builtins.cc: patch does not apply
error: patch failed: gcc/config/riscv/riscv-vector-builtins.def:729
error: gcc/config/riscv/riscv-vector-builtins.def: patch does not apply
error: patch failed: gcc/config/riscv/riscv-vector-builtins.h:297
error: gcc/config/riscv/riscv-vector-builtins.h: patch does not apply
error: patch failed: gcc/config/riscv/vector-iterators.md:4814
error: gcc/config/riscv/vector-iterators.md: patch does not apply
error: patch failed: gcc/config/riscv/vector.md:56
error: gcc/config/riscv/vector.md: patch does not apply
Patch failed at 0001 RISC-V: Add intrinsics support for SiFive Xsfvcp
extensions.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
[kitoc@hsinchu18 gcc]$


On Wed, Jan 8, 2025 at 5:04 PM<shiyul...@iscas.ac.cn> wrote:
From: yulong<shiyul...@iscas.ac.cn>

This patch implements the Sifvie vendor extension Xsfvcp[1]
  support to gcc. Providing a flexible mechanism to extend application
  processors with custom coprocessors and variable-latency arithmetic
   units intrinsics.

[1]https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software

Co-Authored by: Jiawei Chen<jia...@iscas.ac.cn>
Co-Authored by: Shihua Liao<shi...@iscas.ac.cn>
Co-Authored by: Yixuan Chen<chenyix...@iscas.ac.cn>

Diff with V3: Add new RTL mode and sifive_vector.h file and change testcase 
include file.

yulong (2):
   RISC-V: Add intrinsics support for SiFive Xsfvcp extensions.
   RISC-V: Add intrinsics testcases for SiFive Xsfvcp extensions.

  gcc/config.gcc                                |   2 +-
  gcc/config/riscv/constraints.md               |  10 +
  gcc/config/riscv/generic-vector-ooo.md        |   4 +
  gcc/config/riscv/genrvv-type-indexer.cc       |   9 +
  gcc/config/riscv/riscv-c.cc                   |   3 +-
  .../riscv/riscv-vector-builtins-shapes.cc     |  48 +
  .../riscv/riscv-vector-builtins-shapes.h      |   2 +
  .../riscv/riscv-vector-builtins-types.def     |  40 +
  gcc/config/riscv/riscv-vector-builtins.cc     | 362 +++++++-
  gcc/config/riscv/riscv-vector-builtins.def    |  30 +-
  gcc/config/riscv/riscv-vector-builtins.h      |   8 +
  gcc/config/riscv/riscv.md                     |   5 +-
  .../riscv/sifive-vector-builtins-bases.cc     |  78 ++
  .../riscv/sifive-vector-builtins-bases.h      |   3 +
  .../sifive-vector-builtins-functions.def      |  45 +
  gcc/config/riscv/sifive-vector.md             | 871 ++++++++++++++++++
  gcc/config/riscv/sifive_vector.h              |  47 +
  gcc/config/riscv/vector-iterators.md          |  48 +
  gcc/config/riscv/vector.md                    |   3 +-
  .../gcc.target/riscv/rvv/xsfvector/sf_vc_f.c  |  88 ++
  .../gcc.target/riscv/rvv/xsfvector/sf_vc_i.c  | 132 +++
  .../gcc.target/riscv/rvv/xsfvector/sf_vc_v.c  | 107 +++
  .../gcc.target/riscv/rvv/xsfvector/sf_vc_x.c  | 138 +++
  23 files changed, 2074 insertions(+), 9 deletions(-)
  create mode 100644 gcc/config/riscv/sifive_vector.h
  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_f.c
  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_i.c
  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_v.c
  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vc_x.c

--
2.34.1

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