[PATCH v1 7/7] RISC-V: Refine the vector stride load/store testcases

Wed, 20 Nov 2024 22:34:11 -0800 

From: Pan Li <pan2...@intel.com>

The rtl expand dump for IFN check of stride load/store testcase is
different between O2 and O3.  It it reasonable to leverage target
no-opts/any-opts to filte out, instead of the xfail.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c: Take
        the target any-ops instead of xfail.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c: Ditto.
        * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c: Ditto.

Signed-off-by: Pan Li <pan2...@intel.com>
---
 .../riscv/rvv/autovec/strided/strided_ld_st-1-f16.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-f32.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-f64.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-i16.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-i32.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-i64.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-i8.c        | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-u16.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-u32.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-u64.c       | 8 ++++----
 .../riscv/rvv/autovec/strided/strided_ld_st-1-u8.c        | 8 ++++----
 11 files changed, 44 insertions(+), 44 deletions(-)

diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
index c409c5724b1..a128e9fb20a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(_Float16)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
index 01e27d62276..621c26a2df2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(float)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse32.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse32.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
index 0b4ec20a182..48ae5aa6d42 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(double)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse64.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse64.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
index 10875bd5bde..37d43106113 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(int16_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
index bb3ff40ac06..88a9bf02dac 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(int32_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse32.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse32.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
index e0b149fa57f..3b3ad5da6c0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(int64_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse64.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse64.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
index 9dda4b4af51..74f5aea3264 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(int8_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse8.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse8.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
index c13e0dc5bc7..8176006f8bf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(uint16_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse16.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse16.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
index 2c6c45961e8..41531f39f26 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(uint32_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse32.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse32.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
index 5e817e832e1..695964fedb1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(uint64_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse64.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse64.v} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
index 9092aa71327..7bc3b4ee602 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c
@@ -5,9 +5,9 @@
 
 DEF_STRIDED_LD_ST_FORM_1(uint8_t)
 
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
xfail { any-opts "-O2" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
-/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
xfail { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 4 "expand" { 
target { any-opts "-O3" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_LOAD " 2 "expand" { 
target { any-opts "-O2" } } } } */
+/* { dg-final { scan-rtl-dump-times ".MASK_LEN_STRIDED_STORE " 2 "expand" { 
target { any-opts "-O2" } } } } */
 /* { dg-final { scan-assembler-times {vlse8.v} 1 } } */
 /* { dg-final { scan-assembler-times {vsse8.v} 1 } } */
-- 
2.43.0

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