For masked FMA, there're 2 forms of RTL representation
1) (vec_merge (fma: op2 op1 op3) op1) mask)
2) (vec_merge (fma: op1 op2 op3) op1) mask)
It's because op1 op2 are communatative in RTL(the second op1 is
written as (match_dup 1))
we once tried to replace (match_dup 1)
with (match_operand:VFH_AVX512VL 5 "nonimmediate_operand" "0,0")), but
trigger an ICE in reload(reload can handle at most one operand with
"0" constraint).
So the patch do the canonicalizaton for the backend part.
gcc/ChangeLog:
PR target/117072
(<avx512>_fmadd_<mode>_mask<round_name>): Relax predicates of
fma operands from register_operand to nonimmediate_operand
(<avx512>_fmadd_<mode>_mask3<round_name>): Ditto.
(<avx512>_fmsub_<mode>_mask<round_name>): Ditto.
(<avx512>_fmsub_<mode>_mask3<round_name>): Ditto.
(<avx512>_fnmadd_<mode>_mask<round_name>): Ditto.
(<avx512>_fnmadd_<mode>_mask3<round_name>): Ditto.
(<avx512>_fnmsub_<mode>_mask<round_name>): Ditto.
(<avx512>_fnmsub_<mode>_mask3<round_name>): Ditto.
(<avx512>_fmaddsub_<mode>_mask3<round_name>): Ditto.
(<avx512>_fmsubadd_<mode>_mask<round_name>): Ditto.
(<avx512>_fmsubadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vmfmadd_<mode>_mask<round_name>): Ditto.
(avx512f_vmfmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vmfmadd_<mode>_maskz_1<round_name>): Ditto.
(*avx512f_vmfmsub_<mode>_mask<round_name>): Ditto.
(avx512f_vmfmsub_<mode>_mask3<round_name>): Ditto.
(*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Ditto.
(avx512f_vmfnmadd_<mode>_mask<round_name>): Ditto.
(avx512f_vmfnmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Ditto.
(*avx512f_vmfnmsub_<mode>_mask<round_name>): Ditto.
(*avx512f_vmfnmsub_<mode>_mask3<round_name>): Ditto.
(*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Ditto.
(avx10_2_fmaddnepbf16_<mode>_mask3): Ditto.
(avx10_2_fnmaddnepbf16_<mode>_mask3): Ditto.
(avx10_2_fmsubnepbf16_<mode>_mask3): Ditto.
(avx10_2_fnmsubnepbf16_<mode>_mask3): Ditto.
(fmai_vmfmadd_<mode><round_name>): Swap operands[1] and operands[2].
(fmai_vmfmsub_<mode><round_name>): Ditto.
(fmai_vmfnmadd_<mode><round_name>): Ditto.
(fmai_vmfnmsub_<mode><round_name>): Ditto.
(*fmai_fmadd_<mode>): Swap operands[1] and operands[2] adjust
operands[1] predicates from register_operand to
nonimmediate_operand.
(*fmai_fmsub_<mode>): Ditto.
(*fmai_fnmadd_<mode><round_name>): Ditto.
(*fmai_fnmsub_<mode><round_name>): Ditto.
---
gcc/config/i386/sse.md | 86 +++++++++++++++++++++---------------------
1 file changed, 43 insertions(+), 43 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a45b50ad732..9201b1a0782 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -5895,7 +5895,7 @@ (define_insn "<avx512>_fmadd_<mode>_mask<round_name>"
[(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v,v")
(vec_merge:VFH_AVX512VL
(fma:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 1 "register_operand" "0,0")
+ (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
@@ -5914,7 +5914,7 @@ (define_insn "<avx512>_fmadd_<mode>_mask3<round_name>"
(fma:VFH_AVX512VL
(match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
- (match_operand:VFH_AVX512VL 3 "register_operand" "0"))
+ (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0"))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F && <round_mode_condition>"
@@ -5999,7 +5999,7 @@ (define_insn "<avx512>_fmsub_<mode>_mask<round_name>"
[(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v,v")
(vec_merge:VFH_AVX512VL
(fma:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 1 "register_operand" "0,0")
+ (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VFH_AVX512VL
(match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
@@ -6020,7 +6020,7 @@ (define_insn "<avx512>_fmsub_<mode>_mask3<round_name>"
(match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(neg:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 3 "register_operand" "0")))
+ (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0")))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F && <round_mode_condition>"
@@ -6106,7 +6106,7 @@ (define_insn "<avx512>_fnmadd_<mode>_mask<round_name>"
(vec_merge:VFH_AVX512VL
(fma:VFH_AVX512VL
(neg:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 1 "register_operand" "0,0"))
+ (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0"))
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
@@ -6126,7 +6126,7 @@ (define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>"
(neg:VFH_AVX512VL
(match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v"))
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
- (match_operand:VFH_AVX512VL 3 "register_operand" "0"))
+ (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0"))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F && <round_mode_condition>"
@@ -6215,7 +6215,7 @@ (define_insn "<avx512>_fnmsub_<mode>_mask<round_name>"
(vec_merge:VFH_AVX512VL
(fma:VFH_AVX512VL
(neg:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 1 "register_operand" "0,0"))
+ (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0"))
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VFH_AVX512VL
(match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
@@ -6237,7 +6237,7 @@ (define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>"
(match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v"))
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(neg:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 3 "register_operand" "0")))
+ (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0")))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX512F && <round_mode_condition>"
@@ -6369,9 +6369,9 @@ (define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>"
[(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v")
(vec_merge:VFH_AVX512VL
(unspec:VFH_AVX512VL
- [(match_operand:VFH_AVX512VL 1 "register_operand" "v")
+ [(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "v")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
- (match_operand:VFH_AVX512VL 3 "register_operand" "0")]
+ (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0")]
UNSPEC_FMADDSUB)
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
@@ -6421,7 +6421,7 @@ (define_insn "<avx512>_fmsubadd_<mode>_mask<round_name>"
[(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v,v")
(vec_merge:VFH_AVX512VL
(unspec:VFH_AVX512VL
- [(match_operand:VFH_AVX512VL 1 "register_operand" "0,0")
+ [(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VFH_AVX512VL
(match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>"))]
@@ -6440,10 +6440,10 @@ (define_insn
"<avx512>_fmsubadd_<mode>_mask3<round_name>"
[(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v")
(vec_merge:VFH_AVX512VL
(unspec:VFH_AVX512VL
- [(match_operand:VFH_AVX512VL 1 "register_operand" "v")
+ [(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "v")
(match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(neg:VFH_AVX512VL
- (match_operand:VFH_AVX512VL 3 "register_operand" "0"))]
+ (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0"))]
UNSPEC_FMADDSUB)
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
@@ -6460,7 +6460,7 @@ (define_expand "fmai_vmfmadd_<mode><round_name>"
[(set (match_operand:VFH_128 0 "register_operand")
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand")
+ (match_operand:VFH_128 1 "nonimmediate_operand")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"))
(match_dup 1)
@@ -6471,7 +6471,7 @@ (define_expand "fmai_vmfmsub_<mode><round_name>"
[(set (match_operand:VFH_128 0 "register_operand")
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand")
+ (match_operand:VFH_128 1 "nonimmediate_operand")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>")))
@@ -6484,8 +6484,8 @@ (define_expand "fmai_vmfnmadd_<mode><round_name>"
(vec_merge:VFH_128
(fma:VFH_128
(neg:VFH_128
- (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"))
- (match_operand:VFH_128 1 "register_operand")
+ (match_operand:VFH_128 1 "nonimmediate_operand"))
+ (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"))
(match_dup 1)
(const_int 1)))]
@@ -6496,8 +6496,8 @@ (define_expand "fmai_vmfnmsub_<mode><round_name>"
(vec_merge:VFH_128
(fma:VFH_128
(neg:VFH_128
- (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"))
- (match_operand:VFH_128 1 "register_operand")
+ (match_operand:VFH_128 1 "nonimmediate_operand"))
+ (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>")))
(match_dup 1)
@@ -6508,7 +6508,7 @@ (define_insn "*fmai_fmadd_<mode>"
[(set (match_operand:VFH_128 0 "register_operand" "=v,v")
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>, v")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>"))
(match_dup 1)
@@ -6525,7 +6525,7 @@ (define_insn "*fmai_fmsub_<mode>"
[(set (match_operand:VFH_128 0 "register_operand" "=v,v")
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>")))
@@ -6544,8 +6544,8 @@ (define_insn "*fmai_fnmadd_<mode><round_name>"
(vec_merge:VFH_128
(fma:VFH_128
(neg:VFH_128
- (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v"))
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0"))
+ (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>"))
(match_dup 1)
(const_int 1)))]
@@ -6562,8 +6562,8 @@ (define_insn "*fmai_fnmsub_<mode><round_name>"
(vec_merge:VFH_128
(fma:VFH_128
(neg:VFH_128
- (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v"))
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0"))
+ (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>")))
(match_dup 1)
@@ -6581,7 +6581,7 @@ (define_insn "avx512f_vmfmadd_<mode>_mask<round_name>"
(vec_merge:VFH_128
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>"))
(match_dup 1)
@@ -6603,7 +6603,7 @@ (define_insn "avx512f_vmfmadd_<mode>_mask3<round_name>"
(fma:VFH_128
(match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>")
- (match_operand:VFH_128 3 "register_operand" "0"))
+ (match_operand:VFH_128 3 "nonimmediate_operand" "0"))
(match_dup 3)
(match_operand:QI 4 "register_operand" "Yk"))
(match_dup 3)
@@ -6633,7 +6633,7 @@ (define_insn "avx512f_vmfmadd_<mode>_maskz_1<round_name>"
(vec_merge:VFH_128
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>"))
(match_operand:VFH_128 4 "const0_operand")
@@ -6653,7 +6653,7 @@ (define_insn "*avx512f_vmfmsub_<mode>_mask<round_name>"
(vec_merge:VFH_128
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>")))
@@ -6677,7 +6677,7 @@ (define_insn "avx512f_vmfmsub_<mode>_mask3<round_name>"
(match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>")
(neg:VFH_128
- (match_operand:VFH_128 3 "register_operand" "0")))
+ (match_operand:VFH_128 3 "nonimmediate_operand" "0")))
(match_dup 3)
(match_operand:QI 4 "register_operand" "Yk"))
(match_dup 3)
@@ -6693,7 +6693,7 @@ (define_insn "*avx512f_vmfmsub_<mode>_maskz_1<round_name>"
(vec_merge:VFH_128
(vec_merge:VFH_128
(fma:VFH_128
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>")))
@@ -6715,8 +6715,8 @@ (define_insn "avx512f_vmfnmadd_<mode>_mask<round_name>"
(vec_merge:VFH_128
(fma:VFH_128
(neg:VFH_128
- (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v"))
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0"))
+ (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>"))
(match_dup 1)
(match_operand:QI 4 "register_operand" "Yk,Yk"))
@@ -6738,7 +6738,7 @@ (define_insn "avx512f_vmfnmadd_<mode>_mask3<round_name>"
(neg:VFH_128
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>"))
(match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
- (match_operand:VFH_128 3 "register_operand" "0"))
+ (match_operand:VFH_128 3 "nonimmediate_operand" "0"))
(match_dup 3)
(match_operand:QI 4 "register_operand" "Yk"))
(match_dup 3)
@@ -6770,7 +6770,7 @@ (define_insn "avx512f_vmfnmadd_<mode>_maskz_1<round_name>"
(fma:VFH_128
(neg:VFH_128
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v"))
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>"))
(match_operand:VFH_128 4 "const0_operand")
(match_operand:QI 5 "register_operand" "Yk,Yk"))
@@ -6790,8 +6790,8 @@ (define_insn "*avx512f_vmfnmsub_<mode>_mask<round_name>"
(vec_merge:VFH_128
(fma:VFH_128
(neg:VFH_128
- (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v"))
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0"))
+ (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>")))
(match_dup 1)
@@ -6815,7 +6815,7 @@ (define_insn "*avx512f_vmfnmsub_<mode>_mask3<round_name>"
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>"))
(match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
(neg:VFH_128
- (match_operand:VFH_128 3 "register_operand" "0")))
+ (match_operand:VFH_128 3 "nonimmediate_operand" "0")))
(match_dup 3)
(match_operand:QI 4 "register_operand" "Yk"))
(match_dup 3)
@@ -6833,7 +6833,7 @@ (define_insn
"*avx512f_vmfnmsub_<mode>_maskz_1<round_name>"
(fma:VFH_128
(neg:VFH_128
(match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"
"<round_constraint>,v"))
- (match_operand:VFH_128 1 "register_operand" "0,0")
+ (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
(neg:VFH_128
(match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"
"v,<round_constraint>")))
(match_operand:VFH_128 4 "const0_operand")
@@ -32048,7 +32048,7 @@ (define_insn "avx10_2_fmaddnepbf16_<mode>_mask3"
(fma:VBF_AVX10_2
(match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v")
(match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
- (match_operand:VBF_AVX10_2 3 "register_operand" "0"))
+ (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0"))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX10_2_256"
@@ -32113,7 +32113,7 @@ (define_insn "avx10_2_fnmaddnepbf16_<mode>_mask3"
(neg:VBF_AVX10_2
(match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v"))
(match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
- (match_operand:VBF_AVX10_2 3 "register_operand" "0"))
+ (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0"))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX10_2_256"
@@ -32178,7 +32178,7 @@ (define_insn "avx10_2_fmsubnepbf16_<mode>_mask3"
(match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v")
(match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
(neg:VBF_AVX10_2
- (match_operand:VBF_AVX10_2 3 "register_operand" "0")))
+ (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0")))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX10_2_256"
@@ -32246,7 +32246,7 @@ (define_insn "avx10_2_fnmsubnepbf16_<mode>_mask3"
(match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v"))
(match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
(neg:VBF_AVX10_2
- (match_operand:VBF_AVX10_2 3 "register_operand" "0")))
+ (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0")))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
"TARGET_AVX10_2_256"
--
2.31.1
