Hi!
On Mon, Sep 16, 2024 at 11:40:45PM -0400, Michael Meissner wrote:
> With this patch, GCC now realizes that the vector shift instructions will look
> at the bottom 6 bits for the shift count, and it can use either a VSPLTISW or
> XXSPLTIB instruction to load the shift count.
Do we do something like this for integer shift instructions already?
> + operands[4] = ((GET_CODE (operands[2]) == CONST_VECTOR)
> + ? CONST_VECTOR_ELT (operands[2], 0)
> + : XEXP (operands[2], 0));
Useless parens are useless, please lose them?
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr89213.c
> @@ -0,0 +1,106 @@
> +/* { dg-do compile { target { lp64 } } } */
Why only on 64-bit systems? Does it fail with -m32? Why / how?
With that, okay for trunk. Thanks!
Segher
