On 5/19/24 10:28 PM, HAO CHEN GUI wrote:
> +(define_expand "isinf<mode>2"
> + [(use (match_operand:SI 0 "gpc_reg_operand"))
> + (use (match_operand:SFDF 1 "gpc_reg_operand"))]
> + "TARGET_HARD_FLOAT && TARGET_P9_VECTOR"
> +{
> + emit_insn (gen_xststdc<sd>p (operands[0], operands[1], GEN_INT (0x30)));
> + DONE;
> +})
Is there a reason not to use the vsx_register_operand predicate for op1
which matches the predicate for the operand of the xststdc<sd>p pattern
we're passing op1 to?
Ditto for the other optab patches you've submitted.
Peter
