On Mon, May 13, 2024 at 4:14 PM Robin Dapp <[email protected]> wrote:
>
> > What happens if we simply remove all of the force_reg here?
>
> On x86 I bootstrapped and tested the attached without fallout
> (gcc188, so it's no avx512-native machine and therefore limited
> coverage). riscv regtest is unchanged.
> For aarch64 I would to rely on the pre-commit CI to pick it
> up (does that work on sub-threads?).
OK if that pre-commit CI works out.
Richard.
> Regards
> Robin
>
>
> gcc/ChangeLog:
>
> PR middle-end/113474
>
> * internal-fn.cc (expand_vec_cond_mask_optab_fn): Remove
> force_regs.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/autovec/pr113474.c: New test.
> ---
> gcc/internal-fn.cc | 3 ---
> .../gcc.target/riscv/rvv/autovec/pr113474.c | 13 +++++++++++++
> 2 files changed, 13 insertions(+), 3 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
>
> diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc
> index 2c764441cde..4d226c478b4 100644
> --- a/gcc/internal-fn.cc
> +++ b/gcc/internal-fn.cc
> @@ -3163,9 +3163,6 @@ expand_vec_cond_mask_optab_fn (internal_fn, gcall
> *stmt, convert_optab optab)
> rtx_op1 = expand_normal (op1);
> rtx_op2 = expand_normal (op2);
>
> - mask = force_reg (mask_mode, mask);
> - rtx_op1 = force_reg (mode, rtx_op1);
> -
> rtx target = expand_expr (lhs, NULL_RTX, VOIDmode, EXPAND_WRITE);
> create_output_operand (&ops[0], target, mode);
> create_input_operand (&ops[1], rtx_op1, mode);
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
> b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
> new file mode 100644
> index 00000000000..0364bf9f5e3
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr113474.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile { target riscv_v } } */
> +/* { dg-additional-options "-std=c99" } */
> +
> +void
> +foo (int n, int **a)
> +{
> + int b;
> + for (b = 0; b < n; b++)
> + for (long e = 8; e > 0; e--)
> + a[b][e] = a[b][e] == 15;
> +}
> +
> +/* { dg-final { scan-assembler "vmerge.vim" } } */
> --
> 2.45.0
>
