On Mon, 2023-12-18 at 08:39 -0700, Jeff Law wrote:
>
>
> On 12/18/23 06:42, Xi Ruoyao wrote:
> > With simplify_gen_unary we end up with a not fully expanded RTX like
> >
> > (set (reg:SI 90) (and:SI (neg:SI (reg:SI 80)) (const_int 63)))
> >
> > Then it will cause an ICE with unrecognizable insn.
> >
> > gcc/ChangeLog:
> >
> > PR middle-end/113033
> > * expmed.cc (expand_shift_1): When expanding rotate shift, call
> > negate_rtx instead of simplify_gen_unary (NEG, ...).
> The key difference being that using negate_rtx will go through the
> expander which knows how to synthesize negation whereas
> simplify_gen_unary will just generate a (neg ...) and assume it matches
> something in the backend, right?
For PR113033 the key difference (to me) is negate_rtx emits an insn to
set a new pseudo reg to -x. So the result will be
(set (reg:SI 81) (neg:SI (reg:SI 80)))
then
(and (reg:SI 81) (const_int 31))
instead of a consolidated
(and:SI (neg:SI (reg:SI IN)) (const_int 63))
AFAIK no backends have an instruction doing "negate an operand then and
bitwisely".
To me, technically the following operation
other_amount
= simplify_gen_binary (AND, GET_MODE (op1), other_amount,
gen_int_mode (mask, GET_MODE (op1)));
should also be something negate_rtx too or we may still end up with an
ICE with backends incapable to match
(set (reg:SI XX) (and (reg:SI 81) (const_int 31)))
But fortunately most backends has an immediate and operation so it's
unlikely to blow up...
> If so, this patch is fine for the trunk.
--
Xi Ruoyao <xry...@xry111.site>
School of Aerospace Science and Technology, Xidian University
