Few minor comments:
On Mon, Oct 23, 2023 at 5:04 PM Juzhe-Zhong <juzhe.zh...@rivai.ai> wrote:
>
> ICE:
>
> during RTL pass: vsetvl
> <source>: In function 'riscv_lms_f32':
> <source>:240:1: internal compiler error: in merge, at
> config/riscv/riscv-vsetvl.cc:1997
> 240 | }
>
> In general compatible_p (avl_equal_p) has:
>
> if (next.has_vl () && next.vl_used_by_non_rvv_insn_p ())
> return false;
>
> Don't fuse AVL of vsetvl if the VL operand is used by non-RVV instructrions.
instructrions -> instructions
>
> It is reasonable to add it into 'can_use_next_avl_p' since we don't want to
> fuse AVL of vsetvl into a scalar move instruction which doesn't demand AVL.
> And after the fusion, we will alway use compatible_p to check whether the
> demand
> is correct or not.
>
> PR target/111927
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vsetvl.cc: Fix ICE.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/vsetvl/pr111927.c: New test.
>
> ---
> gcc/config/riscv/riscv-vsetvl.cc | 23 ++
> .../gcc.target/riscv/rvv/vsetvl/pr111927.c | 243 ++++++++++++++++++
> 2 files changed, 266 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
>
> diff --git a/gcc/config/riscv/riscv-vsetvl.cc
> b/gcc/config/riscv/riscv-vsetvl.cc
> index 47b459fddd4..42295732ed7 100644
> --- a/gcc/config/riscv/riscv-vsetvl.cc
> +++ b/gcc/config/riscv/riscv-vsetvl.cc
> @@ -1541,6 +1541,29 @@ private:
> inline bool can_use_next_avl_p (const vsetvl_info &prev,
> const vsetvl_info &next)
> {
> + /* Forbid the AVL/VL propagation if VL of NEXT is used
> + by non-RVV instructions. This is because:
> +
> + bb 2:
> + scalar move (no AVL)
Could you add few comment to mention this is prev
> + bb 3:
> + vsetvl a5(VL), a4(AVL) ...
and this is next
> + branch a5,zero
> +
> + Since user vsetvl instruction is no side effect instruction
> + which should be placed in the correct and optimal location
> + of the program by the previous PASS, it is unreasonble that
unreasonble -> unreasonable
> + VSETVL PASS tries to move it to another places if it used by
> + non-RVV instructions.
> +
> + Note: We only forbid the cases that VL is used by the following
> + non-RVV instructions which will cause issues. We don't forbid
> + other cases since it won't cause correctness issues and we still
> + more more demand info are fused backward. The later LCM algorithm
more more -> more
> + should know the optimal location of the vsetvl. */
> + if (next.has_vl () && next.vl_used_by_non_rvv_insn_p ())
> + return false;
> +
> if (!next.has_nonvlmax_reg_avl () && !next.has_vl ())
> return true;
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
> b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
> new file mode 100644
> index 00000000000..62f395fee33
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
> @@ -0,0 +1,243 @@
> +/* { dg-do compile } */
> +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
> +
> +#include "riscv_vector.h"
> +#include <stdio.h>
Including stdio.h will cause multi-lib testing issues, and I don't saw
any function or declaration defined in stdio.h are used in the file,
so I assume this is safe to remove
and could you clean up the testcase? at least drop those unused #else parts?
