Oh I see.
It ICE:
during RTL pass: expand
bug.c:26:9: internal compiler error: in require, at machmode.h:313
26 | i (a);
| ^~~~~
0x1032253 opt_mode<machine_mode>::require() const
../../../../gcc/gcc/machmode.h:313
0x1c47877 riscv_legitimize_move(machine_mode, rtx_def*, rtx_def*)
../../../../gcc/gcc/config/riscv/riscv.cc:2532
0x274bbe0 gen_movdi(rtx_def*, rtx_def*)
../../../../gcc/gcc/config/riscv/riscv.md:2024
0x102cb1c rtx_insn* insn_gen_fn::operator()<rtx_def*, rtx_def*>(rtx_def*,
rtx_def*) const
../../../../gcc/gcc/recog.h:411
0x11fbc8e emit_move_insn_1(rtx_def*, rtx_def*)
../../../../gcc/gcc/expr.cc:4164
0x11fc809 emit_move_insn(rtx_def*, rtx_def*)
../../../../gcc/gcc/expr.cc:4334
0x1039a0b load_register_parameters
../../../../gcc/gcc/calls.cc:2155
0x103d865 expand_call(tree_node*, rtx_def*, int)
../../../../gcc/gcc/calls.cc:3626
0x121e78c expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
../../../../gcc/gcc/expr.cc:11921
0x120ffb8 expand_expr_real(tree_node*, rtx_def*, machine_mode, expand_modifier,
rtx_def**, bool)
../../../../gcc/gcc/expr.cc:9010
0x102c694 expand_expr(tree_node*, rtx_def*, machine_mode, expand_modifier)
../../../../gcc/gcc/expr.h:310
0x105ccc9 expand_call_stmt
../../../../gcc/gcc/cfgexpand.cc:2831
0x10608af expand_gimple_stmt_1
../../../../gcc/gcc/cfgexpand.cc:3880
0x1060f4d expand_gimple_stmt
../../../../gcc/gcc/cfgexpand.cc:4044
0x10699f3 expand_gimple_basic_block
Thanks for catching this.
juzhe.zh...@rivai.ai
From: Kito Cheng
Date: 2023-09-14 17:20
To: juzhe.zh...@rivai.ai
CC: gcc-patches; Kito.cheng; jeffreyalaw; Robin Dapp
Subject: Re: Re: [PATCH V3] RISC-V: Expand VLS mode to scalar mode
move[PR111391]
Could you check if it work correctly for rv64gcv_zve32x? add testcase
no matter if it works or not :)
On Thu, Sep 14, 2023 at 5:19 PM juzhe.zh...@rivai.ai
<juzhe.zh...@rivai.ai> wrote:
>
> Is it Ok for trunk ? Or you want me send a separate patch to remove "@" in
> vec_extract optab ?
>
>
>
> juzhe.zh...@rivai.ai
>
> From: Kito Cheng
> Date: 2023-09-14 16:11
> To: Juzhe-Zhong
> CC: gcc-patches; kito.cheng; jeffreyalaw; rdapp.gcc
> Subject: Re: [PATCH V3] RISC-V: Expand VLS mode to scalar mode move[PR111391]
> On Thu, Sep 14, 2023 at 4:04 PM Juzhe-Zhong <juzhe.zh...@rivai.ai> wrote:
> >
> > This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111391
> >
> > I notice that previous patch (V2 patch) cause additional execution fail of
> > pr69719.c
> > This FAIL is because of the latent BUG of VSETVL PASS.
> >
> > So this patch includes VSETVL PASS fix even though it's not related to the
> > PR111391.
> >
> > I have confirm the whole regression no additional FAILs are introduced.
> >
> > PR target/111391
> >
> > gcc/ChangeLog:
> >
> > * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
> > (vec_extract<mode><vel>): Ditto.
> > * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
> > (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
> > * config/riscv/riscv.cc (riscv_legitimize_move): Expand move.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.target/riscv/rvv/autovec/partial/slp-9.c: Adapt test.
> > * gcc.target/riscv/rvv/autovec/pr111391.c: New test.
> >
> > ---
> > gcc/config/riscv/autovec.md | 2 +-
> > gcc/config/riscv/riscv-vsetvl.cc | 4 ++-
> > gcc/config/riscv/riscv.cc | 32 +++++++++++++++++++
> > .../riscv/rvv/autovec/partial/slp-9.c | 1 -
> > .../gcc.target/riscv/rvv/autovec/pr111391.c | 28 ++++++++++++++++
> > 5 files changed, 64 insertions(+), 3 deletions(-)
> > create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111391.c
> >
> > diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
> > index e74a1695709..7121bab1716 100644
> > --- a/gcc/config/riscv/autovec.md
> > +++ b/gcc/config/riscv/autovec.md
> > @@ -1442,7 +1442,7 @@
> > ;;
> > -------------------------------------------------------------------------
> > ;; ---- [INT,FP] Extract a vector element.
> > ;;
> > -------------------------------------------------------------------------
> > -(define_expand "@vec_extract<mode><vel>"
> > +(define_expand "vec_extract<mode><vel>"
>
> Why remove this? I saw this change was introduced in v3?
>
>
> > [(set (match_operand:<VEL> 0 "register_operand")
> > (vec_select:<VEL>
> > (match_operand:V_VLS 1 "register_operand")
>
