Re: [PATCH] RISC-V: Support VLS basic operation auto-vectorization

[Robin Dapp via Gcc-patches]

Hi Juzhe,

thanks, looks good from my side.

> +/* { dg-final { scan-assembler-times {vand\.vi\s+v[0-9]+,\s*v[0-9]+,\s*-16} 
> 42 } } */
> +/* { dg-final { scan-assembler-not {csrr} } } */

I was actually looking for a scan-assembler-not vsetvli... but the
csrr will do as well.

Regards
 Robin