On 6/9/23 08:37, Robin Dapp wrote:
On 6/9/23 16:32, juzhe.zh...@rivai.ai wrote:
From: Juzhe-Zhong <juzhe.zh...@rivai.ai>
This patch fixes the requirement of V_WHOLE and V_FRACT.
E.g. VNx8QI in V_WHOLE has no requirement which is incorrect.
Actually, VNx8QI should be whole(full) mode when TARGET_MIN_VLEN < 128
since when TARGET_MIN_VLEN == 128, VNx8QI is e8mf2 which is fractional
vector.
gcc/ChangeLog:
* config/riscv/vector-iterators.md: Fix requirement.
I actually have the attached already on my local tree (as well as a test),
and wanted to post it with the vec_set patch. I think the alignment helps
a bit with readability.
From 147a459dfbf1fe9d5dd93148f475f42dee3bd94b Mon Sep 17 00:00:00 2001
From: Robin Dapp <rd...@ventanamicro.com>
Date: Tue, 6 Jun 2023 17:29:26 +0200
Subject: [PATCH] RISC-V: Change V_WHOLE iterator to properly match
instruction.
Currently we emit e.g. an vl1r.v even when loading a mode whose size is
smaller than the hardware vector size. This can happen when reload
decides to switch to another alternative.
This patch fixes the iterator and adds a testcase for the problem.
gcc/ChangeLog:
* config/riscv/vector-iterators.md: Add guards for modes smaller
than the hardware vector size.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c: New test.
Sounds like Juzhe is OK with this moving independently. So I'll rubber
stamp it. :-)
jeff
