(Sorry, this is a very late reply) > -----Original Message----- > From: Gcc-patches <gcc-patches- > bounces+kyrylo.tkachov=arm....@gcc.gnu.org> On Behalf Of Andrea > Corallo via Gcc-patches > Sent: Monday, August 8, 2022 10:34 AM > To: Richard Earnshaw <richard.earns...@foss.arm.com> > Cc: Richard Earnshaw <richard.earns...@arm.com>; nd <n...@arm.com>; > Andrea Corallo via Gcc-patches <gcc-patches@gcc.gnu.org> > Subject: Re: [PATCH 10/12 V2] arm: Implement cortex-M return signing > address codegen > > Richard Earnshaw <richard.earns...@foss.arm.com> writes: > > [...] > > > +(define_insn "pac_nop" > > + [(set (reg:SI IP_REGNUM) > > + (unspec:SI [(reg:SI SP_REGNUM) (reg:SI LR_REGNUM)] > > + UNSPEC_PAC_NOP))] > > + "TARGET_THUMB2" > > + "pac\t%|ip, %|lr, %|sp" > > + [(set_attr "length" "2")]) > > > > This pattern is missing a type. > > Which type do you think is missing? > > > The length is also incorrect as the > > instruction is 32-bits (4 bytes). > > Ack. > > > Similarly for the other > > instructions below. Also, you need to mark them as incompatible with > > conditional execution (they're constrained-unpredictable in IT > > blocks). > > I guess this would translate in setting it with '(set_attr "predicable" "no")' > > But isn't this already the default?
I think Richard means the "conds" attribute. It's something I'd like to see cleaned from the arm backend eventually, but for now there's a (very) late condexec pass that can generate conditional instructions based on that attribute. Basically, it needs to be set to "undconditional" for these instructions. Thanks, Kyrill > > Thanks > > Andrea
