On Sun, Jun 5, 2022 at 7:19 PM Roger Sayle <ro...@nextmovesoftware.com> wrote:
>
>
> This patch extends the recent and;cmp to not;test optimization to also
> perform this transformation for TImode on TARGET_64BIT and DImode on -m32,
> One motivation for this is that it's a step to fixing the current failure
> of gcc.target/i386/pr65105-5.c on -m32.
>
> A more direct benefit for x86_64 is that the following code:
>
> int foo(__int128 x, __int128 y)
> {
> return (x & y) == y;
> }
>
> improves (with -O2 -mbmi) from:
>
> movq %rdi, %r8
> movq %rsi, %rdi
> movq %rdx, %rsi
> andq %rcx, %rdi
> movq %r8, %rax
> andq %rdx, %rax
> movq %rdi, %rdx
> xorq %rsi, %rax
> xorq %rcx, %rdx
> orq %rdx, %rax
> sete %al
> movzbl %al, %eax
> ret
>
> to the much better:
>
> movq %rdi, %r8
> movq %rsi, %rdi
> andn %rdx, %r8, %rax
> andn %rcx, %rdi, %rsi
> orq %rsi, %rax
> sete %al
> movzbl %al, %eax
> ret
>
> The major theme of this patch is to generalize many of i386.md's
> *di3_doubleword patterns to become *<dwi>_doubleword patterns, i.e.
> whenever there exists a "double word" optimization for DImode with -m32,
> there should be an equivalent TImode optimization on TARGET_64BIT.
>
> The following patch has been tested on x86_64-pc-linux-gnu with
> make bootstrap and make -k check, where on TARGET_64BIT there are
> no new failures, but paradoxically with --target_board=unix{-m32}
> the other dg-final clause in gcc.target/i386/pr65105-5.c now fails.
> Counter-intuitively, this is progress, and pr65105-5.c may now be
> fixed (without using peephole2) simply by tweaking the STV pass to
> handle andn/test (in a follow-up patch).
> OK for mainline?
>
>
> 2022-06-05 Roger Sayle <ro...@nextmovesoftware.com>
>
> gcc/ChangeLog
> * config/i386/i386.cc (ix86_rtx_costs) <COMPARE>: Provide costs
> for double word comparisons and tests (comparisons against zero).
> * config/i386/i386.md (*test<mode>_not_doubleword): Split DWI
> and;cmp into andn;cmp $0 as a pre-reload splitter.
> (define_expand and<mode>3): Generalize from SWIM1248x to SWIDWI.
> (define_insn_and_split "*anddi3_doubleword"): Rename/generalize...
> (define_insn_and_split "*and<dwi>3_doubleword"): ... to this.
> (define_insn "*andndi3_doubleword"): Rename and generalize...
> (define_insn "*andn<mode>3_doubleword): ... to this.
> (define_split): Split andn when TARGET_BMI for both <DWI> modes.
> (define_split): Split andn when !TARGET_BMI for both <DWI> modes.
> (define_expand <any_or><mode>3): Generalize from SWIM1248x to
> SWIDWI.
> (define_insn_and_split "*<any_or><dwi>3_doubleword): Generalize
> from DI mode to both <DWI> modes.
>
> gcc/testsuite/ChangeLog
> * gcc.target/i386/testnot-3.c: New test case.
(define_expand "and<mode>3"
- [(set (match_operand:SWIM1248x 0 "nonimmediate_operand")
- (and:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand")
- (match_operand:SWIM1248x 2 "<general_szext_operand>")))]
+ [(set (match_operand:SWIDWI 0 "nonimmediate_operand")
+ (and:SWIDWI (match_operand:SWIDWI 1 "nonimmediate_operand")
+ (match_operand:SWIDWI 2 "<general_operand>")))]
SWIM1248x should be changed to SDWIM mode iterator, not SWIDWI:
;; Math-dependant integer modes with DImode.
(define_mode_iterator SWIM1248x
[(QI "TARGET_QIMODE_MATH")
(HI "TARGET_HIMODE_MATH")
SI DI])
;; All math-dependant single and double word integer modes.
(define_mode_iterator SDWIM [(QI "TARGET_QIMODE_MATH")
(HI "TARGET_HIMODE_MATH")
SI DI (TI "TARGET_64BIT")])
but
;; SWI and DWI together.
(define_mode_iterator SWIDWI [QI HI SI DI (TI "TARGET_64BIT")])
does not handle QI and HI correctly w.r.t. TARGET_[QI,HI]MODE_MATH.
Uros.
