Please ignore this post, as I mistakenly used -1 instead of -2.
YunQiang Su <yunqiang...@cipunited.com> 于2021年8月30日周一 上午10:57写道：
>
> Currently, the asm output file for MIPS has no rev info.
> It can make some trouble, for example:
> assembler is mips1 by default,
> gcc is fpxx by default.
> To assemble the output of gcc -S, we have to pass -mips2
> to assembler.
>
> gcc/ChangeLog:
>
> * gcc/config/mips/mips.c (mips_module_isa_name): New.
> mips_file_start: add .module mipsREV to all asm output
> ---
> gcc/config/mips/mips.c | 41 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
> index 493d3de48..a7087ec0a 100644
> --- a/gcc/config/mips/mips.c
> +++ b/gcc/config/mips/mips.c
> @@ -9841,6 +9841,44 @@ mips_mdebug_abi_name (void)
> }
> }
>
> +static const char *
> +mips_module_isa_name ()
> +{
> + switch (mips_isa)
> + {
> + case MIPS_ISA_MIPS1:
> + return "mips1";
> + case MIPS_ISA_MIPS2:
> + return "mips2";
> + case MIPS_ISA_MIPS3:
> + return "mips3";
> + case MIPS_ISA_MIPS4:
> + return "mips4";
> + case MIPS_ISA_MIPS32:
> + return "mips32";
> + case MIPS_ISA_MIPS32R2:
> + return "mips32r2";
> + case MIPS_ISA_MIPS32R3:
> + return "mips32r3";
> + case MIPS_ISA_MIPS32R5:
> + return "mips32r5";
> + case MIPS_ISA_MIPS32R6:
> + return "mips32r6";
> + case MIPS_ISA_MIPS64:
> + return "mips64";
> + case MIPS_ISA_MIPS64R2:
> + return "mips64r2";
> + case MIPS_ISA_MIPS64R3:
> + return "mips64r3";
> + case MIPS_ISA_MIPS64R5:
> + return "mips64r5";
> + case MIPS_ISA_MIPS64R6:
> + return "mips64r6";
> + default:
> + gcc_unreachable ();
> + }
> +}
> +
> /* Implement TARGET_ASM_FILE_START. */
>
> static void
> @@ -9873,6 +9911,9 @@ mips_file_start (void)
> mips_nan == MIPS_IEEE_754_2008 ? "2008" : "legacy");
>
> #ifdef HAVE_AS_DOT_MODULE
> + fprintf (asm_out_file, "\t.module\t%s\n",
> + mips_module_isa_name ());
> +
> /* Record the FP ABI. See below for comments. */
> if (TARGET_NO_FLOAT)
> #ifdef HAVE_AS_GNU_ATTRIBUTE
> --
> 2.30.2
>
