These three patches replace the following one from the previously-posted series:
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573161.html As suggested by Andrew Stubbs, I've changed the early lowering of DImode multiplication to a define_insn_and_split to keep the operation together until register-allocation time. This indeed seems to improve generated code. I also noticed that SImode multiplication can silently clobber SCC if the "s_mulk_i32" alternative is chosen, so I've done a drive-by fix for that too. Re-tested on GCN bare metal. Julian Julian Brown (3): amdgcn: Mark s_mulk_i32 as clobbering SCC amdgcn: Add [us]mulsi3_highpart SGPR alternatives amdgcn: Add [us]mulsid3/muldi3 patterns gcc/config/gcn/gcn.md | 161 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 153 insertions(+), 8 deletions(-) -- 2.29.2
