Hi,

As subject, this patch rewrites the vpadal_[su]32 Neon intrinsics to use
RTL builtins rather than inline assembly code, allowing for better
scheduling and optimization.

Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.

Ok for master?

Thanks,
Jonathan

---

gcc/ChangeLog:

2021-02-09  Jonathan Wright  <jonathan.wri...@arm.com>

        * config/aarch64/aarch64-simd-builtins.def: Use VDQV_L
        iterator to generate [su]adalp RTL builtins.
        * config/aarch64/aarch64-simd.md: Use VDQV_L iterator in
        [su]adalp RTL pattern.
        * config/aarch64/arm_neon.h (vpadal_s32): Use RTL builtin
        instead of inline asm.
        (vpadal_u32): Likewise.

Attachment: rb14133.patch
Description: rb14133.patch

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