This patch was also applied to the GCC 9 and 10 branches and breaks those builds, because PTA_CLDEMOTE is not defined.
On Mon, Nov 9, 2020 at 4:03 AM Uros Bizjak via Gcc-patches < gcc-patches@gcc.gnu.org> wrote: > On Mon, Nov 9, 2020 at 9:50 AM Cui, Lili <lili....@intel.com> wrote: > > > > Hi Uros, > > > > This patch is to correct some instruction sets for > march=Tremont/Broadwell/Silvermont/knl > > > > Bootstrap is ok, and no regressions for i386/x86-64 testsuite. > > > > OK for master? > > > > [PATCH] Enable MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for > > march=tremont > > > > 1. Enable MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for march=tremont > > 2. Move PREFETCHW from march=broadwell to march=silvermont. > > 3. Add PREFETCHWT1 to march=knl > > > > gcc/ChangeLog: > > > > PR target/97685 > > * config/i386/i386.h: > > (PTA_BROADWELL): Delete PTA_PRFCHW. > > (PTA_SILVERMONT): Add PTA_PRFCHW. > > (PTA_KNL): Add PTA_PREFETCHWT1. > > (PTA_TREMONT): Add PTA_MOVDIRI, PTA_MOVDIR64B, PTA_CLDEMOTE and > PTA_WAITPKG. > > * doc/invoke.texi: Delete PREFETCHW for broadwell, skylake, knl, > knm, > > skylake-avx512, cannonlake, icelake-client, icelake-server, > cascadelake, > > cooperlake, tigerlake and sapphirerapids. > > Add PREFETCHW for silvermont, goldmont, goldmont-plus and > tremont. > > Add XSAVEC and XSAVES for goldmont, goldmont-plus and tremont. > > Add MOVDIRI, MOVDIR64B, CLDEMOTE and WAITPKG for tremont. > > Add KEYLOCKER and HREST for alderlake. > > Add AMX-BF16, AMX-TILE, AMX-INT8 and UINTR for sapphirerapids. > > Add KEYLOCKER for tigerlake. > > OK. > > Thanks, > Uros. > > > --- > > gcc/config/i386/i386.h | 10 +++---- > > gcc/doc/invoke.texi | 59 +++++++++++++++++++++--------------------- > > 2 files changed, 35 insertions(+), 34 deletions(-) > > > > diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h > > index d0c157a9970..5e01fe6b841 100644 > > --- a/gcc/config/i386/i386.h > > +++ b/gcc/config/i386/i386.h > > @@ -2515,8 +2515,7 @@ const wide_int_bitmask PTA_IVYBRIDGE = > PTA_SANDYBRIDGE | PTA_FSGSBASE > > | PTA_RDRND | PTA_F16C; > > const wide_int_bitmask PTA_HASWELL = PTA_IVYBRIDGE | PTA_AVX2 | PTA_BMI > > | PTA_BMI2 | PTA_LZCNT | PTA_FMA | PTA_MOVBE | PTA_HLE; > > -const wide_int_bitmask PTA_BROADWELL = PTA_HASWELL | PTA_ADX | > PTA_PRFCHW > > - | PTA_RDSEED; > > +const wide_int_bitmask PTA_BROADWELL = PTA_HASWELL | PTA_ADX | > PTA_RDSEED; > > const wide_int_bitmask PTA_SKYLAKE = PTA_BROADWELL | PTA_AES | > PTA_CLFLUSHOPT > > | PTA_XSAVEC | PTA_XSAVES | PTA_SGX; > > const wide_int_bitmask PTA_SKYLAKE_AVX512 = PTA_SKYLAKE | PTA_AVX512F > > @@ -2541,16 +2540,17 @@ const wide_int_bitmask PTA_SAPPHIRERAPIDS = > PTA_COOPERLAKE | PTA_MOVDIRI > > const wide_int_bitmask PTA_ALDERLAKE = PTA_SKYLAKE | PTA_CLDEMOTE | > PTA_PTWRITE > > | PTA_WAITPKG | PTA_SERIALIZE | PTA_HRESET | PTA_KL | PTA_WIDEKL; > > const wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF | > PTA_AVX512ER > > - | PTA_AVX512F | PTA_AVX512CD; > > + | PTA_AVX512F | PTA_AVX512CD | PTA_PREFETCHWT1; > > const wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE; > > -const wide_int_bitmask PTA_SILVERMONT = PTA_WESTMERE | PTA_MOVBE | > PTA_RDRND; > > +const wide_int_bitmask PTA_SILVERMONT = PTA_WESTMERE | PTA_MOVBE | > PTA_RDRND > > + | PTA_PRFCHW; > > const wide_int_bitmask PTA_GOLDMONT = PTA_SILVERMONT | PTA_AES | > PTA_SHA | PTA_XSAVE > > | PTA_RDSEED | PTA_XSAVEC | PTA_XSAVES | PTA_CLFLUSHOPT | PTA_XSAVEOPT > > | PTA_FSGSBASE; > > const wide_int_bitmask PTA_GOLDMONT_PLUS = PTA_GOLDMONT | PTA_RDPID > > | PTA_SGX | PTA_PTWRITE; > > const wide_int_bitmask PTA_TREMONT = PTA_GOLDMONT_PLUS | PTA_CLWB > > - | PTA_GFNI; > > + | PTA_GFNI | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_CLDEMOTE | PTA_WAITPKG; > > const wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW > > | PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ; > > > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > > index d2a188d7c75..d01beb248e1 100644 > > --- a/gcc/doc/invoke.texi > > +++ b/gcc/doc/invoke.texi > > @@ -29528,14 +29528,14 @@ BMI, BMI2 and F16C instruction set support. > > > > @item broadwell > > Intel Broadwell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, SSSE3, > > -SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, > > -BMI, BMI2, F16C, RDSEED, ADCX and PREFETCHW instruction set support. > > +SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, > BMI, BMI2, > > +F16C, RDSEED and ADCX instruction set support. > > > > @item skylake > > Intel Skylake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, > SSSE3, > > SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, > > -BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC and > > -XSAVES instruction set support. > > +BMI, BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC and XSAVES > instruction set > > +support. > > > > @item bonnell > > Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 > and SSSE3 > > @@ -29543,52 +29543,53 @@ instruction set support. > > > > @item silvermont > > Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, SSSE3, > > -SSE4.1, SSE4.2, POPCNT, AES, PCLMUL and RDRND instruction set support. > > +SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL and RDRND instruction > set support. > > > > @item goldmont > > Intel Goldmont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, > SSSE3, > > -SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT and FSGSBASE > > -instruction set support. > > +SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, > XSAVES, > > +XSAVEOPT and FSGSBASE instruction set support. > > > > @item goldmont-plus > > Intel Goldmont Plus CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, > > -SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT, > FSGSBASE, > > -PTWRITE, RDPID, SGX and UMIP instruction set support. > > +SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, > XSAVEC, > > +XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX and UMIP instruction > set support. > > > > @item tremont > > Intel Tremont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, > SSSE3, > > -SSE4.1, SSE4.2, POPCNT, AES, PCLMUL, RDRND, XSAVE, XSAVEOPT, FSGSBASE, > PTWRITE, > > -RDPID, SGX, UMIP, GFNI-SSE, CLWB and ENCLV instruction set support. > > +SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, > XSAVES, > > +XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, UMIP, GFNI-SSE, CLWB, MOVDIRI, > > +MOVDIR64B, CLDEMOTE and WAITPKG instruction set support. > > > > @item knl > > Intel Knight's Landing CPU with 64-bit extensions, MOVBE, MMX, SSE, > SSE2, SSE3, > > SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, > FMA, > > -BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, AVX512F, AVX512PF, AVX512ER > and > > +BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHWT1, AVX512F, AVX512PF, AVX512ER > and > > AVX512CD instruction set support. > > > > @item knm > > Intel Knights Mill CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, > > SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, > FMA, > > -BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, AVX512F, AVX512PF, AVX512ER, > AVX512CD, > > +BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHWT1, AVX512F, AVX512PF, > AVX512ER, AVX512CD, > > AVX5124VNNIW, AVX5124FMAPS and AVX512VPOPCNTDQ instruction set support. > > > > @item skylake-avx512 > > Intel Skylake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, > > SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, > RDRND, FMA, > > -BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, > AVX512F, > > +BMI, BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, > > CLWB, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. > > > > @item cannonlake > > Intel Cannonlake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, > SSE2, > > SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, > FSGSBASE, > > -RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, > XSAVEC, > > +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, > > XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, > > AVX512IFMA, SHA and UMIP instruction set support. > > > > @item icelake-client > > Intel Icelake Client CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > > SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, > FSGSBASE, > > -RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, > XSAVEC, > > +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, > > XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, > > AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, > > AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES instruction set support. > > @@ -29596,7 +29597,7 @@ AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES > instruction set support. > > @item icelake-server > > Intel Icelake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > > SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, > FSGSBASE, > > -RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, > XSAVEC, > > +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, > > XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, > > AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, > > AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES, PCONFIG and WBNOINVD > instruction > > @@ -29605,37 +29606,37 @@ set support. > > @item cascadelake > > Intel Cascadelake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, SSSE3, > > SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, > FMA, BMI, > > -BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, > AVX512F, CLWB, > > +BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, CLWB, > > AVX512VL, AVX512BW, AVX512DQ, AVX512CD and AVX512VNNI instruction set > support. > > > > @item cooperlake > > Intel cooperlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, SSSE3, > > SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, > FMA, BMI, > > -BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, > AVX512F, CLWB, > > +BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, CLWB, > > AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VNNI and AVX512BF16 > instruction > > set support. > > > > @item tigerlake > > Intel Tigerlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, SSSE3, > > SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, > FMA, BMI, > > -BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, > AVX512F, > > -AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, AVX512IFMA, SHA, > CLWB, UMIP, > > -RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, AVX512BITALG, AVX512VNNI, > VPCLMULQDQ, > > -VAES, PCONFIG, WBNOINVD, MOVDIRI, MOVDIR64B and AVX512VP2INTERSECT > instruction > > -set support. > > +BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, > > +AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, AVX512IFMA, SHA, CLWB, UMIP, > RDPID, > > +GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, AVX512BITALG, AVX512VNNI, > VPCLMULQDQ, VAES, > > +PCONFIG, WBNOINVD, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT and KEYLOCKER > > +instruction set support. > > > > @item sapphirerapids > > Intel sapphirerapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, > > SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, > RDRND, > > -FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, > XSAVES, > > -AVX512F, CLWB, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VNNI, > AVX512BF16, > > -MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, > WAITPKG, > > -SERIALIZE and TSXLDTRK instruction set support. > > +FMA, BMI, BMI2, F16C, RDSEED, ADCX, CLFLUSHOPT, XSAVEC, XSAVES, > AVX512F, CLWB, > > +AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VNNI, AVX512BF16, MOVDIRI, > > +MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, > SERIALIZE, > > +TSXLDTRK, UINTR, AMX-BF16, AMX-TILE and AMX-INT8 instruction set > support. > > > > @item alderlake > > Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, > SSE3, SSSE3, > > SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, > CLDEMOTE, > > -PTWRITE, WAITPKG and SERIALIZE instruction set support. > > +PTWRITE, WAITPKG, SERIALIZE, KEYLOCKER and HRESET instruction set > support. > > > > @item k6 > > AMD K6 CPU with MMX instruction set support. > > -- > > 2.17.1 > > > >
