On Fri, Jul 17, 2020 at 02:47:50PM -0500, Peter Bergner wrote:
> PR92488 shows we do not generate hardware conversion instructions when
> converting from _Decimal128 to _Decimal32. There is no one instruction
> that does the conversion, so we currently call the __dpd_trunctdsd2
> function to do the conversion for us. This is slow. Paul Murphy
> described a short sequence of dfp hardware instructions that would do
> the conversion correctly. The patch below implements that idea.
>
> The convert-fp-128.c test case uses dg-require-effective-target dfp,
> so its !dfp usages are basically disabling those tests completely.
> What we really want is to know whether the compiler is generating
> hardware instructions or calling the libcalls. For that, we need
> to test hard_dfp.
>
> This patch bootstrapped and regtested with no regressions on
> powerpc64le-linux.
> Segher, you pre-approved the pattern, but I thought I'd have you double
> check the test case changes and new test case.
>
> Still ok for trunk?
Yes. Thanks!
> gcc/
> PR target/92488
> * config/rs6000/dfp.md (trunctdsd2): New define_insn.
>
> gcc/testsuite/
> PR target/92488
> * gcc.target/powerpc/convert-fp-128.c (bl, drsp, drdpq): Update counts.
> (__dpd_trunctdsd2): Make conditional on !hard_dfp.
> (__dpd_extendsddd2, __dpd_extendsdtd2, __dpd_truncddsd2,
> __dpd_extendddtd2, __dpd_trunctddd2): Use !hard_dfp.
> * gcc.target/powerpc/pr92488.c: New test.
>
> diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
> index e91d6f581ed..50bfad6beb7 100644
> --- a/gcc/config/rs6000/dfp.md
> +++ b/gcc/config/rs6000/dfp.md
> @@ -155,6 +155,16 @@
> [(set_attr "type" "dfp")
> (set_attr "length" "8")])
>
> +(define_insn "trunctdsd2"
> + [(set (match_operand:SD 0 "gpc_reg_operand" "=d")
> + (float_truncate:SD (match_operand:TD 1 "gpc_reg_operand" "d")))
> + (clobber (match_scratch:TD 2 "=&d"))
> + (clobber (match_scratch:DF 3 "=&d"))]
> + "TARGET_DFP"
> + "mffs %3\;mtfsfi 7,7,1\;drdpq %2,%1\;mtfsf 0xff,%3,1,0\;drsp %0,%2"
> + [(set_attr "type" "dfp")
> + (set_attr "length" "20")])
Side note:
On ISA 3.0B and later you can do
mffscdrni %3,7
drdpq %2,%1
mffscdrn %3,%3
drsp %0,%2
(saving one insn, and using somewhat cheaper insns). But that is only
on newer machines, so is this worth it at all? :-)
Segher
